CN107611015A - A kind of preparation method of high brightness acid corrosion silicon chip - Google Patents
A kind of preparation method of high brightness acid corrosion silicon chip Download PDFInfo
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- CN107611015A CN107611015A CN201710816698.8A CN201710816698A CN107611015A CN 107611015 A CN107611015 A CN 107611015A CN 201710816698 A CN201710816698 A CN 201710816698A CN 107611015 A CN107611015 A CN 107611015A
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- fused alumina
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Abstract
The invention discloses a kind of preparation method of high brightness acid corrosion silicon chip.This method includes grinding technics and sour etching technique, is first ground first using the white fused alumina in coarse grain footpath, and lapping liquid mass ratio is water:White fused alumina:Grinding aid=2:1:0.2;Secondary grinding is carried out using the white fused alumina of fine grain again, lapping liquid mass ratio is water:White fused alumina:Grinding aid=2:(1.5~2):0.2;Acid corrosion liquid volume ratio is nitric acid:Hydrofluoric acid:Glacial acetic acid=5:(2‑2.5):(1‑2).Grinding uses white fused alumina particle diameter as 7.0 μm 10.0 μm first, and secondary grinding uses white fused alumina particle diameter as 3.5 μm 6.5 μm.The surface roughness of silicon chip is 150 200nm after grinding twice, and acid corrosion removal amount is 50 80 μm, and the surface roughness of silicon chip is 40 80nm after acid corrosion.This method is simple, easily operated, can effectively reduce silicon chip acid corrosion removal amount.
Description
Technical field
The present invention relates to semi-conducting material process technology, more particularly to a kind of preparation side of high brightness acid corrosion silicon chip
Method.
Background technology
As the process technology using IGBT as the novel power transistor of representative improves constantly, silicon chip is proposed higher
Requirement.Due to acid corrosion silicon chip compared with caustic corrosion silicon chip with brighter and cleaner surface, lower roughness, lower surface metal
The production efficiency of content and Geng Gao, is increasingly favored.Further, since reducing the needs of cost, some device manufacturers are progressively opened
Begin to prepare electronic device using the relatively higher polished silicon wafer of acid corrosion piece alternative cost and epitaxial wafer, this just proposes acid corrosion piece
Higher technical requirements, high brightness, high reflectance, the acid corrosion piece of low surface roughness become the requirement of acid corrosion piece.
Many industrial technology personnel and scientific research personnel do a lot of work in high brightness etched sheet field, have inquired into erosion removal amount, temperature
The influences of the parameter to acid corrosion piece roughness such as degree, acid solution service condition.But routinely prepare the work of high brightness acid corrosion piece
Skill is, it is necessary to very big erosion removal amount(Take around 80-120 μm of removal)The brightness of requirement is can be only achieved, undoubtedly causes silicon
The waste of material.How to reduce the removal amount of high brightness etched sheet acid corrosion, while ensure that the bright and clean degree of silicon chip surface turns into
One the problem of needing to consider.The work that high brightness etched sheet is a system is developed, relies solely on acid corrosion procedure technology
Improvement, it is difficult to effectively reduce production high brightness acid corrosion piece acid corrosion removal amount.
The content of the invention
In view of prior art situation, the production for high brightness acid corrosion silicon chip needs, and present invention offer is a kind of simply, has
The system of effect, a kind of easily operated method-high brightness acid corrosion silicon chip for reducing high brightness acid etching silicon chip sour erosion removal amount
Preparation Method.
The present invention adopts the technical scheme that:A kind of preparation method of high brightness acid corrosion silicon chip, it is characterised in that:The party
Method includes grinding technics and sour etching technique, and wherein grinding technics is taken grinds twice, is first carried out using the white fused alumina in coarse grain footpath
Grind first, lapping liquid mass ratio is water:White fused alumina:Grinding aid=2:1:0.2;Carried out again using the white fused alumina of fine grain afterwards
Secondary grinding, lapping liquid mass ratio are water:White fused alumina:Grinding aid=2:(1.5~2):0.2;Carried out twice after the completion of grinding technics
Acid corrosion, acid corrosion liquid volume ratio are nitric acid:Hydrofluoric acid:Glacial acetic acid=5:(2-2.5):(1-2).
For 7.0 μm -10.0 μm, secondary grinding uses white the particle diameter of the present invention for grinding the white fused alumina used first
The particle diameter of corundum is 3.5 μm -6.5 μm.
Milling time first of the present invention is 800-1200s;Secondary milling time is 200-500s.
Nitric acid, hydrofluoric acid in acid corrosion liquid of the present invention, the concentration of glacial acetic acid are respectively nitric acid 63%, hydrofluoric acid
49%, glacial acetic acid 99%.
Corrosive liquid temperature of the present invention is 20-25 DEG C, etching time 70-120s.
The invention has the advantages that:Using this method, the table of abrasive sheet is effectively reduced by grinding twice
Surface roughness, the surface roughness of silicon chip is 150-200nm after grinding twice, and the removal of acid corrosion is carried out to the silicon chip after grinding
Measure as 50-80 μm, the surface roughness of silicon chip is 40-80nm after acid corrosion, effectively reduces postorder acid corrosion removal amount.This hair
It is bright simple, easily operated.
Brief description of the drawings
Fig. 1 is the removal amount and silicon chip surface roughness that the present invention uses average grain diameter as 5 μm of white fused alumina grinding silicon chip
Graph of relation;
Fig. 2 is that the present invention uses average grain diameter coarse for the acid corrosion removal amount and silicon chip surface of 5 μm of white fused alumina grinding silicon chip
The graph of relation of degree.
Embodiment
The invention will be further described with reference to embodiments:
Embodiment:Silicon chip doping type, crystal orientation N<111>P-doped, resistivity are 40-50 Ω ㎝.Grinding uses first
The average grain diameter of white fused alumina is 8.5 μm, and lapping liquid proportioning is:10kg white fused aluminas, 20L water, 2L grinding aids, milling time are
1000s.For 5 μm, lapping liquid proportioning is the secondary average grain diameter for grinding the white fused alumina used:16kg white fused aluminas, 20L water, 2L are helped
Grinding agent, milling time 400s.Grinding pressure is 0.5psi, grinder rotating speed 10rpm twice.Acid corrosion liquid temperature degree is 21
DEG C, the acid corrosion time is 100s, and acid corrosion liquid volume ratio is:Nitric acid:Hydrofluoric acid:Glacial acetic acid=5:2:2.Nitre in acid corrosion liquid
Acid, hydrofluoric acid, the concentration of glacial acetic acid are respectively nitric acid 63%, hydrofluoric acid 49%, glacial acetic acid 99%.
From figure 1 it appears that larger without the abrasive sheet roughness of fine grinding, roughness is about 320nm, secondary grinding
Afterwards, the surface roughness of silicon chip gradually reduces, and grinds 200s, when removal amount is 5 μm or so, roughness is about 240nm;Grinding
400s, removal amount, which increases, reaches 9 μm or so, and roughness is reduced to 190 μm or so.But continue to increase milling time, silicon chip surface is thick
Rugosity will not be reduced further, and be held in 190 μm or so.
, it is necessary to control sour etching technique, as shown in Figure 2 after obtaining compared with the abrasive sheet of low roughness.Acid corrosion removal amount
Substantially linear with silicon chip surface roughness, when removal amount only has 50 μm, roughness is 68nm or so, and works as removal amount
When increasing to 100 μm, silicon chip surface roughness can be with as little as 25nm.And can meet to require because roughness is less than 70nm, because
This is one can consider that more than 50 μm removal amounts that can reach requirement of silicon slice corrosion.
Claims (5)
- A kind of 1. preparation method of high brightness acid corrosion silicon chip, it is characterised in that:This method includes grinding technics and acid corrosion work Skill, wherein grinding technics are taken grinds twice, is first ground first using the white fused alumina in coarse grain footpath, and lapping liquid mass ratio is Water:White fused alumina:Grinding aid=2:1:0.2;Secondary grinding is carried out using the white fused alumina of fine grain again afterwards, lapping liquid mass ratio is Water:White fused alumina:Grinding aid=2:(1.5~2):0.2;Acid corrosion is carried out after the completion of grinding technics twice, acid corrosion liquid volume ratio is Nitric acid:Hydrofluoric acid:Glacial acetic acid=5:(2-2.5):(1-2).
- A kind of 2. preparation method of high brightness acid corrosion silicon chip according to claim 1, it is characterised in that:Grinding is adopted first The particle diameter of white fused alumina is 7.0 μm -10.0 μm, and the secondary particle diameter for grinding the white fused alumina used is 3.5 μm -6.5 μm.
- A kind of 3. preparation method of high brightness acid corrosion silicon chip according to claim 2, it is characterised in that:When grinding first Between be 800-1200s;Secondary milling time is 200-500s.
- A kind of 4. preparation method of high brightness acid corrosion silicon chip according to claim 1, it is characterised in that:In acid corrosion liquid Nitric acid, hydrofluoric acid, the concentration of glacial acetic acid be respectively nitric acid 63%, hydrofluoric acid 49%, glacial acetic acid 99%.
- A kind of 5. preparation method of high brightness acid corrosion silicon chip according to claim 4, it is characterised in that:Corrosive liquid temperature For 20-25 DEG C, etching time 70-120s.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109545663A (en) * | 2018-12-12 | 2019-03-29 | 中国电子科技集团公司第四十六研究所 | A kind of silicon corrosion machining process of high flat degree |
CN110277307A (en) * | 2019-05-28 | 2019-09-24 | 天津中环领先材料技术有限公司 | A kind of process preparing single side high brightness sour piece |
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CN1109636A (en) * | 1993-12-28 | 1995-10-04 | 佳能株式会社 | Semiconductor substrate and process for producing same |
US20020142619A1 (en) * | 2001-03-30 | 2002-10-03 | Memc Electronic Materials, Inc. | Solution composition and process for etching silicon |
CN1428463A (en) * | 2001-12-20 | 2003-07-09 | 瓦克硅电子股份公司 | Crystal seed for making monocrystalline silicon and method for making monocrystalline silicon |
CN102069448A (en) * | 2009-10-28 | 2011-05-25 | 硅电子股份公司 | Method for producing a semiconductor wafer |
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2017
- 2017-09-12 CN CN201710816698.8A patent/CN107611015A/en active Pending
Patent Citations (4)
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CN1109636A (en) * | 1993-12-28 | 1995-10-04 | 佳能株式会社 | Semiconductor substrate and process for producing same |
US20020142619A1 (en) * | 2001-03-30 | 2002-10-03 | Memc Electronic Materials, Inc. | Solution composition and process for etching silicon |
CN1428463A (en) * | 2001-12-20 | 2003-07-09 | 瓦克硅电子股份公司 | Crystal seed for making monocrystalline silicon and method for making monocrystalline silicon |
CN102069448A (en) * | 2009-10-28 | 2011-05-25 | 硅电子股份公司 | Method for producing a semiconductor wafer |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109545663A (en) * | 2018-12-12 | 2019-03-29 | 中国电子科技集团公司第四十六研究所 | A kind of silicon corrosion machining process of high flat degree |
CN110277307A (en) * | 2019-05-28 | 2019-09-24 | 天津中环领先材料技术有限公司 | A kind of process preparing single side high brightness sour piece |
CN110277307B (en) * | 2019-05-28 | 2022-02-11 | 天津中环领先材料技术有限公司 | Process method for preparing single-side high-brightness sour bean curd slices |
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