CN107221510B - System and method for separating semiconductor die from die attach film tape - Google Patents
System and method for separating semiconductor die from die attach film tape Download PDFInfo
- Publication number
- CN107221510B CN107221510B CN201610164091.1A CN201610164091A CN107221510B CN 107221510 B CN107221510 B CN 107221510B CN 201610164091 A CN201610164091 A CN 201610164091A CN 107221510 B CN107221510 B CN 107221510B
- Authority
- CN
- China
- Prior art keywords
- die
- base layer
- attach film
- pressure
- semiconductor die
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
- H01L2221/68386—Separation by peeling
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Systems and methods are disclosed for removing semiconductor die from a die-attached tape during a wafer dicing process. The tape includes a base layer and a DAF applied to the base layer. The base layer may include a pattern of through-hole vias. The system includes an extraction tool including a support table, a fan, and a vacuum port. The support table further includes an aperture. The fan is disposed in or adjacent the aperture. The DAF is biased away from the base layer by positioning the tape on a support table with the die centered over the aperture and a fan applying positive pressure to the DAF through the aperture. When the vacuum side extraction die and DAF are detached from the base layer, stress within the semiconductor die is reduced.
Description
Background
The strong growth in demand for portable consumer electronics has driven the demand for high capacity memory devices. Non-volatile semiconductor memory devices, such as flash memory cards, are being widely used to meet the increasing demand for digital information storage and exchange. Their portability, versatility and rugged design, along with their high reliability and large capacity, make such memory devices ideal for use in a wide variety of electronic devices, including, for example, digital cameras, digital music players, video game consoles, PDAs and mobile telephones.
Although a wide variety of packaging configurations are known, flash memory storage cards can generally be fabricated as system-in-package (SIP) or multi-die modules (MCM), in which case multiple die are mounted on a substrate in a so-called three-dimensional stacked configuration. Prior art fig. 1 shows an edge view of a conventional semiconductor package 20 (without a molding compound). A typical package includes a plurality of semiconductor die 22, 24 mounted to a substrate 26. The substrate 26 may be formed with contact pads 28 on an upper surface and the semiconductor die 22, 24 may be formed with die bond pads 30 on the upper surface. Wire bonds 32 are soldered between die bond pads 30 of the semiconductor die 22, 24 and contact pads 28 of the substrate 26 to electrically couple the semiconductor die to the substrate. Electrical leads on and within the substrate, in turn, provide electrical pathways between the die and the host device. Once the electrical connections are made between the die and the substrate, the assembly is typically encapsulated in a molding compound to provide a protective package.
To form the semiconductor package, a die bonding process is performed, in which case the semiconductor die is cut from a wafer, picked from an adhesive tape, and bonded to a substrate. Prior art fig. 2 shows a wafer 40 including a plurality of semiconductor die, such as die 22 (only some of which are numbered in fig. 2). Each semiconductor die 22 on wafer 40 has been processed to include an integrated circuit, as is known in the art, capable of performing a particular electronic function. After performing bad die inspection on the die 22, the wafer may be placed on an adhesive film called a Die Attach Film (DAF) tape and then diced, for example, by sawing or laser. The dicing process separates the wafer into individual semiconductor die 22, with the individual semiconductor die 22 remaining attached to the DAF tape. Fig. 2 shows the wafer 40 attached to a DAF tape 44.
To separate the individual die, the wafer and DAF tape are placed in a process tool, a portion of which is shown in prior art fig. 3. Fig. 3 shows a die extraction tool (die extractor tool)50 that includes a vacuum chuck 52 that supports the wafer 40 and the DAF tape 44. To extract the lift-off die from the DAF tape 44, a pick-up tool 60 including a vacuum tip 62 is provided. The pick tool 60 is lowered over the die 22 to be removed from the DAF tape 44, a vacuum is applied to the end 62, and the die 22 is then pulled off the tape 44. The pick tool then transports the die 22 for attachment to a substrate or elsewhere.
While die extraction tools performed well enough in the past, die thickness has currently been reduced to 25 micrometers (μm) and thinner. At these thicknesses, the reaction forces exerted on the die by the DAF tape and vacuum tip may crack, deform, and/or damage the die, reducing yield and slowing manufacturing time.
Drawings
Fig. 1 is a prior art end view of a conventional semiconductor device.
Fig. 2 is a prior art view of a semiconductor wafer mounted on a DAF tape.
Fig. 3 is a prior art side view of a conventional extraction tool separating semiconductor die on a wafer from a DAF tape.
Fig. 4 is an operational flow diagram illustrating the present technique in the manufacture of a semiconductor device.
Fig. 5 is a cross-sectional edge view of a DAF strip including vias in accordance with embodiments of the present technique.
Fig. 6 is a cross-sectional edge view of a base layer of a DAF tape including a tool to create vias in the base layer.
Fig. 7 is a top view of a segment of a DAF strip including a via pattern in accordance with embodiments of the present technique.
Fig. 8 is a cross-sectional edge view of a semiconductor die mounted to a DAF tape in accordance with an embodiment of the present technology.
Fig. 9 is a top view of a semiconductor die mounted to a segment of a DAF tape in accordance with embodiments of the present technique.
Fig. 10 is a top view of a support table of an extraction tool in accordance with an embodiment of the present system.
Fig. 11 is a cross-sectional edge view of a portion of a die extraction tool including the mount shown in fig. 10.
Fig. 11A is a cross-sectional edge view of a portion of a die extraction tool including a support table in accordance with another embodiment of the present technology.
Fig. 12 is a cross-sectional edge view of a stretched semiconductor die mounted to a DAF tape in accordance with embodiments of the present technique.
Fig. 13 is a top view of a stretched semiconductor die mounted to a segment of a DAF tape in accordance with embodiments of the present technique.
Fig. 14 is a cross-sectional edge view of a die extraction tool for extraction including a vacuum tip engaged with a semiconductor die.
Fig. 15 is a cross-sectional edge view of an extracted die extraction tool including a vacuum tip engaged with a semiconductor die.
Fig. 16 and 17 are top and cross-sectional edge views of a die extraction tool in accordance with alternative embodiments of the present technology.
Fig. 18 and 19 are top and cross-sectional edge views of a die extraction tool in accordance with another alternative embodiment of the present technology.
Fig. 20 is an edge view of a final semiconductor device including a semiconductor die formed by the method of the present system.
Detailed Description
Embodiments will now be described with reference to the accompanying drawings, which relate to systems and methods of separating semiconductor die from adhesive tape, and semiconductor devices formed using such separated die. In an embodiment, the adhesive tape is formed with a plurality of through-hole vias for fluid flow. The wafer is mounted to an adhesive tape, which can then be stretched to separate the dies and widen the through-hole vias.
The die extraction tool may then remove the die from the adhesive tape. The die extraction tool may include a support stage, such as a chuck having a central bore. The tape and die may be mounted on a chuck and clamped to the chuck by a clamping plate on the top side of the die. The die extraction tool may also include a fan attached to the nozzle, the fan blowing air into the central hole and onto the bottom side of the adhesive tape. The positive pressure is communicated to the bottom side of the bare chip through a through hole in the adhesive tape. The vacuum terminal may then grab the semiconductor die from the upper surface of the die and separate the die from the tape. The negative pressure on the upper surface of the die is coupled with the positive pressure on the underside of the die, allowing the die to be freely separated from the adhesive tape without creating stress in the die that could damage the die.
It is understood that the present invention may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the invention to those skilled in the art. Indeed, the invention is intended to cover alternatives, modifications and equivalents of these embodiments, which are included within the scope and spirit of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that the present invention may be practiced without such specific details.
The terms "top" and "bottom", "upper" and "lower", and "vertical" and "horizontal" as may be used herein are for purposes of illustration and description only and are not intended to limit the description of the invention since the articles referred to may be interchanged in position and orientation. Also, the terms "substantially" and/or "approximately" as used herein mean a particular dimension or parameter that may vary within acceptable manufacturing tolerances in a given application. In one embodiment, the acceptable manufacturing tolerance is ± 0.25%.
Embodiments of the present invention will now be explained with reference to the flowchart of fig. 4 and the views of fig. 5-19. Referring first to the views of fig. 5-7, adhesive tape 100 (referred to herein as DAF tape 100) includes a base layer 106 and a DAF 108. The base layer 106 may be formed, for example, from polyester or the like laminated with an adhesive DAF layer. In an embodiment, the base layer 106 may be about 50 μm and the DAF108 may be about 10 μm, but it should be understood that the thickness of the base layer and/or DAF may be greater or less than these thicknesses in further embodiments. One example of a DAF strap 100 that may be used is EM-310VJ-P WEF from Nitto Denko corporation, headquarters in osaka, japan. However, it should be understood that a variety of other tapes may be used, which may be formed with through-hole vias and may hold the diced semiconductor wafers together in an extraction tool, as explained below.
In step 200, a through-hole via 102 for fluid flow (referred to herein as a through-hole via 102) is formed through the base layer 106. Through-hole via 102 may be formed in base layer 106 prior to application of DAF108 to base layer 106. However, it is envisioned that in further embodiments, the via vias 102 may be formed after application of the DAF 108.
Fig. 6 and 7 show an edge view and a top view, respectively, of a segment of the base layer 106. The DAF tape 100 can be cut into individual segments having a length L and width W large enough to support a semiconductor wafer mounted thereon as explained below (in further embodiments, the axes of the length and width can be reversed). Alternatively, the DAF tape 100 including the through-hole vias may be formed on a roll, and cut into individual segments when the wafer is mounted thereon.
Where the base layer 106 is supported on a table or at two or more edges, a plurality of through-hole vias 102 (one of which is labeled in fig. 5-7) may be formed through the entire thickness of the base layer 106. The through-hole vias 102 may be formed by a piercing tool 104 as shown in fig. 6. The piercing tool may include a plurality of needles having sharp ends capable of piercing the adhesive strip 100 to form through-hole vias 102. In embodiments, the number of needles in the piercing tool 104 may vary. May be a single row that covers the entire length of a segment of the base layer 106, thus forming one row of apertures, and then moved across the width to form the next row of apertures until all of the apertures are formed across the length and width of the segment of the base layer 106. Which may be a single column of needles covering the entire width of a segment of the base layer 10, thus forming a column of holes, and then moved along the length to form the next column of holes until all of the holes are formed across the length and width of the segment of the base layer 106.
In further embodiments, the needles of the perforation tool 104 may cover a portion of a row or column. In further embodiments, there may be an x-y array of pins in the perforation tool 104 that form an x-y grid of through-hole vias 102 in segments of the base layer 106. There may be a sufficient number of pins in the x-y array to fabricate all of the through-hole vias in a segment of the base layer 106 in a single pass. Alternatively, the x-y array may occupy less than the entire length and/or width of the segments of base layer 106, such that through-hole vias 102 may be formed in multiple passes. In yet another embodiment, the perforation tool may have a single needle that moves across the rows and columns to form the holes.
In an alternative embodiment, instead of a needle, the piercing tool 104 may include a plurality of drill bits that rotate to drill through the substrate 106. In an embodiment, there may be a single drill bit moving across the rows and columns. In further embodiments, there may be multiple drill bits having any of the configurations described above for the needle. Instead of a needle or drill bit, the piercing tool may comprise one or more lasers having any of the configurations described above. In an embodiment, the through-hole via 102 may have a diameter of about 400 μm to about 800 μm, although it is understood that in further embodiments, the diameter of the through-hole via 102 may be smaller or larger than this range. In embodiments, the density of the vias 102 of the base layer 106 may vary, but in an example, there may be 10 to 500 vias per square inch. In alternative embodiments, the number may be greater or less.
Although fig. 7 shows a staggered row and column pattern, in further embodiments, the through-hole vias 102 may be arranged in a variety of other patterns. The rows and/or columns of through-hole vias 102 may be aligned with respect to each other, and the through-hole vias may be arranged as a plurality of concentric circles on the segment of the base layer 106. When semiconductor die are removed from DAF tape 100, the semiconductor die may be more prone to stress at their edges. Thus, in further embodiments, the through-hole vias 102 may be formed in the base layer 106, and the wafer may be aligned with the DAF tape in a controlled manner, to enable a greater density of through-hole vias in the portion of the tape that is aligned with the outer edges of the die, once the wafer is mounted on the tape, as explained below.
In the embodiments described above, the through-hole vias may be circular. However, in further embodiments, the through-hole vias may be slots, or other shapes having various lengths and widths.
Once the through-hole via 102 is formed in the base layer 106, the DAF108 may be laminated onto the base layer in step 201. Fig. 5 shows an edge view of the final DAF strip 100. In an embodiment, the DAF tape 100 may carry a liner 109 that covers the DAF 108.
Independent of the formation of the through-hole vias 102 in the DAF tape 100, semiconductor die can be formed on a wafer and inspected in step 202. As shown in the edge view of fig. 8 and the top view of fig. 9, respectively, the wafer 110 including the individual die 112 may then be attached to the DAF108 of the tape 100 (after the liner 109 has been removed) and diced in step 204. In one example, die 112 may be diced from wafer 110 to have a length of 12.96mm, a width of 9.28mm, and a thickness of 25 μm. It should be understood that these dimensions are merely examples, and that in alternative embodiments, each dimension may vary. For example, in further embodiments, die 122 may be thinner than 25 μm. After the wafer 110 is attached to the DAF tape, the wafer can be diced into individual semiconductor die 112 using various known dicing techniques, such as saw dicing or laser dicing. Once the die are mounted on the tape, a typical dicing process leaves small cuts 114 between adjacent die.
In step 206, the segment of DAF tape 100 including wafer 110 may be transported to a die extraction tool 120, the die extraction tool 120 including a support table, such as chuck 122, as shown in the top view of fig. 10 and the cross-sectional view of fig. 11, respectively. The chuck 122 may be a circular table that includes a central aperture 124 formed through the entire thickness of the chuck 122. The chuck may have a thickness of between 0.2mm and 0.6mm, and more particularly 0.4mm, although in further embodiments the thickness of the support table may vary outside of this range.
In an embodiment, the central aperture 124 may be rectangular, having the same, or slightly larger, or slightly smaller dimensions as the semiconductor die 112. It should be understood that in further embodiments, the shape of the central aperture need not be rectangular, and the length to width aspect ratio may be different than the aspect ratio of the semiconductor die 112. Although the wells are shown as being fully open wells, for example in fig. 10, it should be understood that the wells 124 may have an upper perforated plate that is coplanar with the remaining upper surface of the chuck 122. In embodiments including such a perforated plate, the openings are large enough to allow air from a fan (explained below) to communicate through the central aperture 124 to the upper surface of the chuck 122.
As indicated and illustrated in fig. 11, the die extraction tool 120 may further include a fan 128 for blowing a gas (e.g., clean air, nitrogen, or other gas) through a nozzle 130 into the central bore 124 in the direction of arrow a. Fan 128 may blow air into central bore 124 to create a force against DAF108 that is twice the amount of attraction between DAF108 and base layer 106. It should be appreciated that in further embodiments, the fan may blow air to create more or less force against DAF 108.
As explained below, a fan 128 is provided to blow air over the DAF108 of a die 112 disposed over the central aperture 124 to help separate the DAF108 on the die from the base layer 106. It is desirable that the gas be applied to the dies over the central aperture 124, and not to the dies surrounding the central aperture 124. In one embodiment, this may be facilitated by a nozzle 130 such as that shown in fig. 11, the nozzle 130 having a tapered portion 130a that increases in diameter from its base (away from its opening adjacent the upper surface of the chuck 122) to its opening. The taper 130a provides a fluid flow pattern represented by the length of arrow a in fig. 11, with longer arrows representing higher fluid flow pressures than shorter arrows.
In a further embodiment shown in fig. 11A, the nozzle 130 may include an outer tube 132a and an inner tube 132 b. The outer tube 132a may receive fluid from the fan 128a and the inner tube 132b may receive fluid from the fan 128b, where the fan 128b provides fluid at a higher pressure than the fluid from the fan 128 a. This may also produce a fluid flow pattern represented by the length of arrows a in fig. 11A, where longer arrows represent higher fluid flow pressures than shorter arrows. In an embodiment, the pressure of the fluid in the inner tube 132b may be 20% greater than the pressure of the fluid in the outer tube 132a, however in further embodiments it may be a greater or lesser percentage.
Once the DAF tape 100 is placed on the chuck 122, the tape may be stretched in a known manner to separate the die 112 of the wafer 110 in step 208, as shown in the side view of fig. 12 and the top view of fig. 13, respectively. In addition to separating the dies 112, the stretched DAF tape 100 also increases the size of the through-hole vias 102, for example to about 500 μm to 1000 μm. In further embodiments, the via 102 may be stretched to a size that is larger or smaller than this size. It should also be understood that DAF tape 100 may be stretched before being brought to die extraction tool 120.
In an embodiment, as shown in the cross-sectional view of fig. 14, the die extraction tool 120 may further include a clamping plate (chucking plate) 134. The clamp plate 134 may be supported by a support mechanism (not shown). Once the wafer 100 is supported on the chuck 122, the clamp plate 134 can be lowered 210 onto the upper surface of the wafer 110 to rest slightly against the upper surface of the semiconductor die 112 so as not to damage the integrated circuits within the upper surface of the semiconductor die. The die extraction tool 120 may further include a vacuum tip 140 of known configuration. The clamp plate 134 may include an opening 136. The vacuum end 140 may be supported for translation up and down through the opening 136 of the clamp plate 134.
In operation, a die 112, such as die 112a, to be extracted from wafer 110 may be disposed over a central aperture 124 in chuck 122. Thereafter, the clamp plate 134 may be lowered 210 to a position against the upper surface of the wafer 110. With the clamp plate in place, the fan is activated in step 214. As shown in fig. 14, vacuum tip 140 may then be lowered against die 112 a.
As shown in fig. 15, by applying a negative pressure to the upper surface of the die 112a, the die 112 and DAF layer may be pulled up and off of the base layer 106 of the DAF tape 100 in step 216. As explained below, DAF108 is used to attach die 112 to other dies in a substrate or semiconductor device.
In conventional designs, the forces on the upper surface of the die 112 and the reaction force of the DAF on the bottom surface of the die can create stresses in the die that can damage the die, especially at current die thicknesses. In accordance with the present technique, a fan 128 blows a gas that creates a positive pressure onto the underside of the base layer 106 of the DAF tape 100. These positive pressures communicate to the DAF through the through-hole vias 102 in the base layer 106. This positive pressure provides a "peel force" that is large enough to separate DAF108 from base layer 106, or significantly reduces the amount of force required to separate DAF108 from base layer 106. The peel force provided by the positive pressure allows the DAF108 and die 112 to be easily pulled away from the base layer 106 and prevents stresses within the die 112 that might otherwise damage the die.
In one embodiment, the fan may apply a pressure of 0.2MPa to 0.1MPa to DAF108 through-hole via 102. Given the large ratio of the size of the via 102 to the thickness of the base layer 106, the fluid flow energy loss through the via 102 is negligible. DAF108 is held to the base layer at a pressure of about 0.1MPa to 0.05 MPa. And DAF108 is held to die 112 at a pressure greater than about 1.0 MPa. Thus, at these respective pressures, once the fan 128 in the chuck 122 is activated, the DAF108 and the semiconductor die 112 will be easily pulled away from the base layer 106 together, and the base layer 106 remains on the chuck 122. It should be understood that the pressures discussed above are examples only, and may be varied in alternative embodiments. Once the die 112 and DAF108 are separated from the base layer 106, the fan 128 may be turned off.
Once the die is lifted onto the vacuum end 140, the die can be carried away and mounted on a substrate as explained below. In step 220, the wafer 110 may be repositioned on the chuck 122 in step 220 such that the next die is disposed on the center hole 124 to be removed as explained above. Steps 210, 214, 216, and 220 may be repeated until all die are removed from DAF tape 100.
The top view of fig. 16 and the cross-sectional edge view of fig. 17 illustrate a die extraction tool 120 in accordance with further embodiments of the present technology. In this embodiment, the die extraction tool 120 is as described above except that the clamp plate 134 is omitted in the embodiment of fig. 16 and 17. Alternatively, in the embodiment of fig. 16 and 17, chuck 122 includes a plurality of vacuum holes 150 (one of which is numbered in both fig. 16 and 17) connected to a vacuum 152.
Once the vacuum tip 140 is lowered onto the die 112 to be removed from the DAF tape 100, the vacuum 152 may be activated to create a negative pressure in the direction of arrow B in the vacuum holes 150 that is effective to hold the DAF tape 100 on the chuck 122. Fan 128 may then be activated to create a positive pressure against DAF108 through-hole vias 102 to allow easy removal of die 112 on vacuum side 140 as described above. The force on the DAF tape 100 generated by the vacuum 152 exceeds the force on the DAF tape 100 generated by the fan 128 so that the DAF tape 100 is held securely on the chuck 122 when the fan 128 blows against the bottom surface of the DAF tape 100.
The top view of fig. 18 and the cross-sectional edge view of fig. 19 illustrate a die extraction tool 120 in accordance with further embodiments of the present technology. In this embodiment, die extraction tool 120 is as described above, except that chuck 122 may include a matrix (cross-hatched) pattern of support bars 154 with open spaces 156 between support bars 154. In addition, the central opening 124 of the above embodiments may be omitted.
Once the vacuum tip 140 is lowered onto the die 112 to be removed from the DAF tape 100, the wafer 110 may be held on the chuck 122 by the clamp 134 or vacuum 152 as described above. Fan 128 may then be activated to create a positive pressure against DAF108 through open space 156 and through-hole vias 102 to allow easy removal of die 112 on vacuum tip 140 as described above. In this embodiment, chuck 122 may be a transfer table supported by a mechanism (not shown) that controllably moves chuck 122 in the x and/or y directions. Thus, when the wafer 110 is repositioned to extract a die from the wafer, the entire chuck 122 can be moved in the x and/or y directions. The nozzle 130 may remain stationary. The wafer 110 and DAF tape 100 can remain fixed in a single position on the chuck 122 without having to reposition the wafer 110 and DAF tape 100.
Fig. 20 illustrates a semiconductor device 170 assembled using semiconductor die extracted by the method described above. Semiconductor device 170 includes a plurality of semiconductor die including one or more die 112. These dies may be, for example, non-volatile memory coupled with controller die 174 (e.g., an ASIC). Other types of die are contemplated. The die is electrically coupled to substrate 176, for example, via wire bonds 178. Passive devices (not shown) may further be mounted on the substrate 176. The device 170 may be, for example, a Land Grid Array (LGA) package that may be removably inserted into and removed from a host device. In such embodiments, the substrate may include contact fingers 180 on the bottom surface of the device for engaging with terminals in the host device. The devices may be encapsulated in a molding compound 182 to protect the semiconductor die and other devices from shock and moisture.
In general, the present technology may be directed to a semiconductor device including a semiconductor die, the semiconductor device formed by a method comprising: (a) securing the semiconductor die on a chuck, mounting the semiconductor die to a tape, the tape including a base layer including a plurality of through-hole vias and a Die Attach Film (DAF) adhered to a first surface of the base layer; (b) blowing air onto a second surface of the base layer opposite the first surface of the base layer and through the through-hole via to apply pressure to the die attach film, the pressure biasing the die attach film away from the base layer; and (c) removing the semiconductor die and the die attach film from the base layer, the pressure biasing the die attach film away from the base layer reducing stress in the semiconductor die when the semiconductor die and the die attach film are removed from the base layer.
In another example, the present technology relates to a method of forming a semiconductor device including a semiconductor die: the method comprises the following steps: (a) attaching the semiconductor die to a tape, the tape including a base layer and a Die Attach Film (DAF) attached to a first surface of the base layer, the die attach film securing the semiconductor die to the tape; (b) attaching the tape and the die to a stage with a second surface of the base layer opposite the first surface of the base layer against the stage; (c) blowing air onto the die attach film through the base layer to apply pressure to the die attach film, the pressure deflecting the die attach film from the base layer; and (d) removing the semiconductor die and the die attach film from the base layer, the pressure biasing the die attach film away from the base layer reducing stress in the semiconductor die when the semiconductor die and the die attach film are removed from the base layer.
In another example, the present technology relates to a tool for extracting a semiconductor die from a tape having a base layer, a first layer of Die Attach Film (DAF), and a second layer of die attach film, the first layer and the second layer held together with a peel strength, the tool comprising: a support table including an upper surface for supporting the tape and the semiconductor die, the support table further including an aperture therethrough; and a fan disposed in or adjacent to the aperture in the support table, the fan operable to blow air through the base layer onto the die attach film to apply pressure to the die attach film, the pressure biasing the die attach film away from the base layer.
In a further example, the present technology relates to a tape for securing semiconductor die cut from a wafer on a process tool, the tape comprising: a base layer; and a Die Attach Film (DAF) applied over the base layer for adhering to the semiconductor die, the die attach film adhering to the base layer with a pressure that can be overcome such that the die attach film can be transferred from the base layer onto the semiconductor die, the base layer including a plurality of vias operable to communicate a gas at a positive pressure to a surface of the die attach film to bias the die attach film away from the base layer.
The foregoing detailed description has been presented for purposes of illustration and description. The description is not intended to be exhaustive or to limit the description to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. The described embodiments were chosen in order to best explain the principles of the claimed system and its practical application, to thereby enable others skilled in the art to best utilize the claimed system in various embodiments with various modifications as are suited to the particular use contemplated. The scope of the method is defined by the appended claims.
Claims (19)
1. A semiconductor device comprising a semiconductor die, the semiconductor device formed by a method comprising:
(a) securing the semiconductor die on a chuck, mounting the semiconductor die to a tape, the tape including a base layer including a plurality of through-hole vias and a Die Attach Film (DAF) attached to a first surface of the base layer;
(b) blowing air onto a second surface of the base layer opposite the first surface of the base layer to apply pressure to the die attach film through the through hole, the pressure biasing the die attach film away from the base layer, wherein a first pressure is used to blow air onto a portion of the die attach film under an edge portion of the semiconductor die, the first pressure being greater than 0, and a second pressure is used to blow air onto a portion of the die attach film under a center portion of the semiconductor die, the second pressure being greater than the first pressure; and
(c) removing the semiconductor die and the die attach film from the base layer, the pressure biasing the die attach film away from the base layer reduces stress in the semiconductor die when the semiconductor die and the die attach film are removed from the base layer.
2. The semiconductor device of claim 1, further comprising the step of stretching the tape to increase the size of the through-hole via prior to the step (b) of blowing air onto the second surface of the base layer.
3. The semiconductor device of claim 1, wherein the step (b) of blowing air onto the second surface of the base layer comprises the step of blowing air onto the second surface of the base layer under the semiconductor die without blowing air onto other semiconductor die adjacent to the semiconductor die.
4. The semiconductor device of claim 1, wherein the step (a) of securing the semiconductor die to a chuck comprises the step of clamping an area surrounding the semiconductor die to the chuck using a clamp plate.
5. The semiconductor device of claim 1, wherein the step (a) of securing the semiconductor die to a chuck comprises the step of applying a negative pressure to a substrate surrounding the semiconductor die via the chuck.
6. A method of forming a semiconductor device including a semiconductor die, comprising:
(a) securing the semiconductor die to a tape, the tape including a base layer and a Die Attach Film (DAF) secured to a first surface of the base layer, the die attach film securing the semiconductor die to the tape;
(b) securing the tape and the die to a stage with a second surface of the base layer opposite the first surface of the base layer against the stage;
(c) blowing air through the base layer onto the die attach film to apply a pressure to the die attach film, the pressure biasing the die attach film away from the base layer, wherein a first pressure is used to blow air onto portions of the die attach film under edge portions of the semiconductor die, the first pressure being greater than 0, and a second pressure is used to blow air onto portions of the die attach film under a center portion of the semiconductor die, the second pressure being greater than the first pressure; and
(d) removing the semiconductor die and the die attach film from the base layer, the pressure biasing the die attach film away from the base layer reduces stress in the semiconductor die when the semiconductor die and the die attach film are removed from the base layer.
7. The method of claim 6, wherein the step (c) of blowing air onto the die attach film comprises the step of blowing air through vias formed in the base layer.
8. The method of claim 7, further comprising the step of stretching the tape to increase the size of the via prior to the step (c) of blowing air onto the second surface of the base layer.
9. The method of claim 6, wherein the step (b) of securing the tape and the die to a stage comprises the step of clamping an area surrounding the semiconductor die to the stage using a clamp plate.
10. The method of claim 6, wherein the step (b) of securing the tape and the die to the table includes the step of applying a negative pressure to the base layer surrounding the semiconductor die through the table.
11. A tool for extracting a semiconductor die from a tape having a base layer, a first layer of Die Attach Film (DAF), and a second layer of die attach film, the first layer and the second layer held together with a peel strength, the tool comprising:
a support table including an upper surface for supporting the tape and the semiconductor die, the support table further including an aperture therethrough; and
a fan disposed in or adjacent to the aperture in the support table, the fan operable to blow air through the base layer onto the die attach film to apply pressure to the die attach film, the pressure biasing the die attach film away from the base layer,
wherein the fan comprises a first fan and a nozzle, wherein the nozzle comprises an outer tube and an inner tube positioned within the outer tube, the tool further comprising a second fan, the first fan providing gas through the outer tube to the die attach film at a first pressure, the first pressure being greater than 0, the second fan providing the gas through the inner tube to the die attach film at a second pressure, the second pressure being greater than the first pressure, wherein a negative pressure is applied to underneath all other semiconductor die adjacent to the semiconductor die.
12. The tool of claim 11, further comprising a vacuum tip operable to contact a semiconductor die disposed over the aperture and remove the semiconductor die and the die attach film from the base layer.
13. The tool of claim 11, further comprising a clamp plate for securing semiconductor die not located on the aperture to the support table.
14. A tape for securing semiconductor die cut from a wafer to a process tool, the tape comprising:
a base layer; and
a Die Attach Film (DAF) applied over the base layer for adhering to the semiconductor die, the die attach film adhering to the base layer with a pressure that can be overcome to enable transfer of the die attach film from the base layer onto the semiconductor die, the base layer including a plurality of vias operable to communicate gas at a positive pressure to a surface of the die attach film to bias the die attach film away from the base layer,
wherein the die attach film is blown over portions of the semiconductor die under the edge portions using a first pressure, the first pressure being greater than 0, and the die attach film is blown over portions of the semiconductor die under the center portion using a second pressure, the second pressure being greater than the first pressure.
15. The tape of claim 14, further comprising a liner applied to a surface of the die attach film opposite a surface of the die attach film in contact with the base layer, the liner protecting the die attach film during shipping of the tape, and the liner being removed before the die attach film is adhered to the semiconductor die.
16. The tape of claim 14 wherein the via is formed through the base layer before the die attach film is applied to the base layer.
17. The tape of claim 14, wherein the via is formed by a drill bit drilling through the base layer.
18. The tape as claimed in claim 14, wherein the via is formed by a needle piercing through the base layer.
19. The belt as claimed in claim 14, wherein the base layer is formed of polyester.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610164091.1A CN107221510B (en) | 2016-03-22 | 2016-03-22 | System and method for separating semiconductor die from die attach film tape |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610164091.1A CN107221510B (en) | 2016-03-22 | 2016-03-22 | System and method for separating semiconductor die from die attach film tape |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107221510A CN107221510A (en) | 2017-09-29 |
CN107221510B true CN107221510B (en) | 2020-09-15 |
Family
ID=59927304
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610164091.1A Expired - Fee Related CN107221510B (en) | 2016-03-22 | 2016-03-22 | System and method for separating semiconductor die from die attach film tape |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN107221510B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11728199B2 (en) * | 2019-12-23 | 2023-08-15 | Asmpt Nexx, Inc. | Substrate support features and method of application |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040089515A1 (en) * | 2002-11-11 | 2004-05-13 | Cheol-Joon Yoo | Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape |
CN102044404A (en) * | 2009-10-12 | 2011-05-04 | 桑迪士克股份有限公司 | System for separating cut semiconductor bare chip from bare chip adhesive tape |
JP2012209384A (en) * | 2011-03-29 | 2012-10-25 | Lintec Corp | Dicing tape and method of manufacturing chipped components |
CN103681411A (en) * | 2012-08-31 | 2014-03-26 | 细美事有限公司 | Bare die discharging device |
CN103681406A (en) * | 2012-08-29 | 2014-03-26 | 株式会社日立高新技术仪器 | Die bonding apparatus, die picking up apparatus and die picking up method |
CN104733345A (en) * | 2013-12-20 | 2015-06-24 | 晟碟信息科技(上海)有限公司 | Bare chip prestripping device and method |
US9196520B1 (en) * | 2014-08-01 | 2015-11-24 | Freescale Semiconductor, Inc. | Tape release systems and methods for semiconductor dies |
-
2016
- 2016-03-22 CN CN201610164091.1A patent/CN107221510B/en not_active Expired - Fee Related
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040089515A1 (en) * | 2002-11-11 | 2004-05-13 | Cheol-Joon Yoo | Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape |
US20050062301A1 (en) * | 2002-11-11 | 2005-03-24 | Cheol-Joon Yoo | Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape |
US20050095100A1 (en) * | 2002-11-11 | 2005-05-05 | Cheol-Joon Yoo | Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape |
CN102044404A (en) * | 2009-10-12 | 2011-05-04 | 桑迪士克股份有限公司 | System for separating cut semiconductor bare chip from bare chip adhesive tape |
JP2012209384A (en) * | 2011-03-29 | 2012-10-25 | Lintec Corp | Dicing tape and method of manufacturing chipped components |
CN103681406A (en) * | 2012-08-29 | 2014-03-26 | 株式会社日立高新技术仪器 | Die bonding apparatus, die picking up apparatus and die picking up method |
CN103681411A (en) * | 2012-08-31 | 2014-03-26 | 细美事有限公司 | Bare die discharging device |
CN104733345A (en) * | 2013-12-20 | 2015-06-24 | 晟碟信息科技(上海)有限公司 | Bare chip prestripping device and method |
US9196520B1 (en) * | 2014-08-01 | 2015-11-24 | Freescale Semiconductor, Inc. | Tape release systems and methods for semiconductor dies |
Also Published As
Publication number | Publication date |
---|---|
CN107221510A (en) | 2017-09-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8499813B2 (en) | System for separating a diced semiconductor die from a die attach tape | |
CN1323431C (en) | Semiconductor producing device and method for producing semiconductor device | |
US6759274B2 (en) | Semiconductor chip pick-up method | |
US6869264B2 (en) | Method and apparatus for picking up a semiconductor chip, method and apparatus for removing a semiconductor chip from a dicing tape, and a method of forming a perforated dicing tape | |
US7563642B2 (en) | Manufacturing method of a semiconductor device | |
TWI419213B (en) | Universal die detachment apparatus | |
KR20100034756A (en) | Semiconductor die having a redistribution layer | |
US6408510B1 (en) | Method for making chip scale packages | |
US10325881B2 (en) | Vertical semiconductor device having a stacked die block | |
JP2008103390A (en) | Manufacturing method of semiconductor device | |
US9038264B2 (en) | Non-uniform vacuum profile die attach tip | |
CN107221510B (en) | System and method for separating semiconductor die from die attach film tape | |
US20220139739A1 (en) | Apparatus for transferring die in bonding equipment and method thereof | |
US10490529B2 (en) | Angled die semiconductor device | |
US20080092360A1 (en) | Thin semiconductor chip pickup apparatus and method | |
JP4599075B2 (en) | Semiconductor manufacturing apparatus and semiconductor device manufacturing method | |
US9462694B2 (en) | Spacer layer for embedding semiconductor die | |
US20060030130A1 (en) | Method of dicing a wafer | |
US6534392B1 (en) | Methods of making microelectronic assemblies using bonding stage and bonding stage therefor | |
JP4782177B2 (en) | Chip stack manufacturing equipment | |
JP3610888B2 (en) | SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING DEVICE, CIRCUIT BOARD AND ELECTRONIC DEVICE | |
JP2014157904A (en) | Electronic component placing table and die bonder including the same | |
US20100184255A1 (en) | Manufacturing method for package structure | |
KR20100038708A (en) | Die attaching method in semiconductor packaging process | |
JP2005353883A (en) | Manufacturing method of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20200915 Termination date: 20210322 |