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JP3610888B2 - SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING DEVICE, CIRCUIT BOARD AND ELECTRONIC DEVICE - Google Patents

SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING DEVICE, CIRCUIT BOARD AND ELECTRONIC DEVICE Download PDF

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Publication number
JP3610888B2
JP3610888B2 JP2000204016A JP2000204016A JP3610888B2 JP 3610888 B2 JP3610888 B2 JP 3610888B2 JP 2000204016 A JP2000204016 A JP 2000204016A JP 2000204016 A JP2000204016 A JP 2000204016A JP 3610888 B2 JP3610888 B2 JP 3610888B2
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semiconductor chip
adhesive tape
semiconductor device
manufacturing
semiconductor
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JP2002026038A (en
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義春 尾形
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Seiko Epson Corp
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Seiko Epson Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置及びその製造方法、半導体装置の製造装置、回路基板並びに電子機器に関する。
【０００２】
【発明の背景】
高密度の半導体装置を実現するため、近年、半導体チップの薄型化が進んでいる。これによって、製造時において半導体チップの取り扱いが従来にも増して難しくなっている。
【０００３】
例えば、接着テープ上において個片に切断された半導体チップを、その後、基板上に搭載するまでの間の取り扱いにおいて、半導体チップに直接的に加えられるストレスで、半導体チップが割れてしまう場合があった。
【０００４】
本発明はこの問題点を解決するためのものであり、その目的は、半導体チップの取り扱いに優れる半導体装置及びその製造方法、半導体装置の製造装置、回路基板並びに電子機器に関する。
【０００５】
【課題を解決するための手段】
（１）本発明に係る半導体装置の製造方法は、
電極を有する半導体チップが一方の面に貼り付けられた接着テープを、その他方の面でステージに吸着させる工程を含み、
前記ステージの前記接着テープを吸着する支持面には、砥粒材で削られることによって形成された複数の突起が２次元的に広がっており、
前記接着テープを前記ステージに吸着させる工程で、前記接着テープを、前記複数の突起で支持して、突起間において前記半導体チップから剥がす。
【０００６】
本発明によれば、半導体チップを、例えば接着テープ越しにピンによって突き上げることなく、接着テープから剥離できる。これによって、突き上げピンによる調整及び管理等の手間をなくすことができる。また、ピンで突き上げることによる半導体チップへの直接的なストレスをなくすことができる。したがって、例えば、薄く割れやすい半導体チップであっても、容易に半導体装置を製造できる。
【０００７】
（２）この半導体装置の製造方法において、前記突起は、前記ステージの前記支持面が砥粒材で削られることによって形成されてもよい。
【０００８】
これによれば、例えば、一様に複数の突起が細かく並んだ支持面で接着テープを吸着できるので、バランス良く接着テープを吸着できる。これによって、接着テープをステージに吸着させたときに半導体チップが傾くことを妨げ、かつ、効果的に半導体チップを接着テープから剥がすことができる。
【０００９】
（３）この半導体装置の製造方法において、前記接着テープは、所定のエネルギーを加えることでその接着力が弱められる性質を有し、
前記接着テープを前記ステージに吸着させる工程を終える前に、前記接着テープに前記エネルギーを加えて、前記接着テープと前記半導体チップとの接着力を弱める工程をさらに含んでもよい。
【００１０】
これによって、より容易に接着テープを半導体チップから剥がすことができる。
【００１１】
（４）この半導体装置の製造方法において、前記接着テープは、紫外線を照射することでその接着力が弱められる性質を有し、
前記接着力を弱める工程は、前記接着テープに紫外線を照射して、前記接着テープと前記半導体チップとの接着力を弱める工程であってもよい。
【００１２】
これによって、より容易に接着テープを半導体チップから剥がすことができる。
【００１３】
（５）この半導体装置の製造方法において、前記接着テープを前記ステージに吸着させる工程の後に、
前記半導体チップを前記接着テープとは反対側で吸着して、前記半導体チップを前記接着テープから分離する工程をさらに含んでもよい。
【００１４】
これによれば、ステージの支持面は、その吸着時に半導体チップが傾くことを妨げるようになっているので、半導体チップを傷つけることなく容易に接着テープとは反対側で吸着できる。
【００１５】
（６）この半導体装置の製造方法において、前記半導体チップを前記接着テープから分離する工程の後に、
前記半導体チップを、吸着した状態で所定の搭載領域に搬送し、その吸着を解除するとともに気体の圧縮によって押圧して前記搭載領域に搭載する工程をさらに含んでもよい。
【００１６】
これによれば、気体の圧縮によって半導体チップを押圧するので、直接的に半導体チップの面をツールで押圧する必要がない。これによって、半導体チップを傷つけることなく搭載できる。また、気体の圧縮によって押圧するので、半導体チップに搭載に必要な応力をほぼ均一に加えることができる。したがって、例えば、半導体チップを搭載領域との間に気泡残すことなく確実に搭載できる。
【００１７】
（７）この半導体装置の製造方法において、前記半導体チップは、前記電極が形成された側とは反対側の面において前記接着テープが貼り付けられ、
前記半導体チップを分離及び搬送する工程で、前記半導体チップを前記電極が形成された側の面から吸着し、
前記半導体チップを搭載する工程で、気体の圧縮によって、前記半導体チップの前記電極が形成された側の面を押圧して、前記半導体チップの前記電極が形成された側とは反対側の面を前記搭載領域に対向させて搭載してもよい。
【００１８】
これによって、半導体チップの電極が形成された側の面を傷つけることなく半導体チップを搭載できる。
【００１９】
（８）この半導体装置の製造方法において、前記半導体チップの前記電極が形成された側の面の内側を避けて外周において、ツールを接触させることによって、前記ツールと前記半導体チップにおける前記電極が形成された側の面との間に空間が設けられ、前記空間に強制的に気体を出し入れさせて、前記半導体チップを吸着又は押圧してもよい。
【００２０】
これによれば、ツールと半導体チップの面との空間に、気体を出し入れさせるだけで、半導体チップを吸着又は押圧できる。これによって、１つのツールでこれらの工程を行うことができる。したがって、一連の工程として素早く半導体チップを搬送及び搭載できる。また、ツールは半導体チップの面の外周に接触するので、半導体チップの面を傷つけることなく搬送及び搭載できる。
【００２７】
（９）本発明に係る半導体装置は、上記半導体装置の製造方法によって製造されてなる。
【００２８】
（１０）本発明に係る回路基板は、上記半導体装置が搭載されている。
【００２９】
（１１）本発明に係る電子機器は、上記半導体装置を有する。
【００３０】
（１２）本発明に係る半導体装置の製造装置は、
半導体チップが一方の面に貼り付けられた接着テープを、他方の面で吸着するステージを含み、
前記ステージは、接着テープを支える支持面と、前記支持面に接着テープを吸着させる吸引孔と、を有し、
前記ステージの前記支持面には、砥粒材で削られることによって形成された複数の突起が２次元的に広がっている。
【００３１】
本発明によれば、接着テープを半導体チップから剥離するときに、半導体チップを、例えば接着テープ越しにピンによって突き上げることなく、接着テープから剥離できる。これによって、突き上げピンによる調整及び管理等の手間をなくすことができる。また、ピンで突き上げることによる半導体チップへの直接的なストレスをなくすことができる。したがって、例えば、薄く割れやすい半導体チップであっても、容易に半導体装置を製造できる装置を提供できる。
【００３２】
（１３）この半導体装置の製造装置において、前記突起は、前記ステージの前記支持面が砥粒材で削られることによって形成されてもよい。
【００３３】
これによれば、接着テープを半導体チップから剥離するときに、例えば、一様に複数の突起が細かく並んだ支持面で接着テープを吸着できるので、バランス良く接着テープを吸着できる。これによって、接着テープをステージに吸着させたときに半導体チップが傾くことを妨げ、かつ、効果的に半導体チップを接着テープから剥がすことができる。
【００３４】
【発明の実施の形態】
以下、本発明の好適な実施の形態について図面を参照して説明する。ただし、本発明は、以下の実施の形態に限定されるものではない。
【００３５】
図１〜図３は、本実施の形態に係る半導体装置の製造方法及びその製造装置を示す図である。また、図４は、本実施の形態に係る半導体装置の製造方法を示す図である。
【００３６】
本実施の形態では、半導体チップ１０を用意する。半導体チップ１０は、図示しない半導体ウェーハが個片に切断されることで形成されてもよい。半導体チップ１０の外形は、矩形をなすことが多いがこれに限定されない。半導体チップ１０は、複数の電極１２を有する。電極１２は、半導体チップ１０の内部に形成された集積回路の電極となる。電極１２は、半導体チップ１０の集積回路を有する側の面（能動面）に形成されてもよい。電極１２は、半導体チップ１０の面の端部に並んでいても、中央部に並んでいてもよい。電極１２は、例えばアルミニウムなどで形成される。なお、半導体チップ１０には、電極１２が形成された側の面に、パッシベーション膜（図示しない）が形成されてもよい。
【００３７】
図１に示すように、半導体チップ１０は、接着テープ２０に貼り付けられている。例えば、接着テープ２０は、半導体ウェーハの切断時に使用されたものであってもよい。詳しくは、接着テープ２０は、半導体ウェーハの面に、切断する側とは反対側に貼り付けられ、切断後の複数の半導体チップ１０にそのまま貼り付けられたものであってもよい。半導体ウェーハは電極１２を有する側の面が切断面となることが多く、この場合には図１に示すように、接着テープ２０は、半導体チップ１０の電極１２が形成された側の面とは反対側の面に貼り付けられる。なお、この場合の接着テープ２０は、ダイシングテープと称してもよい。
【００３８】
あるいは、接着テープ２０は、半導体チップ１０の電極１２が形成された側の面に貼り付けられていてもよい。なお、本実施の形態では、接着テープ２０は、例えば半導体ウェーハを切断した後の半導体チップ１０に改めて貼り付けられてもよい。
【００３９】
接着テープ２０は、例えば、半導体ウェーハの切断によって個片となった半導体チップ１０を確実に接着し、かつ、後の工程で、半導体チップ１０を容易に剥離できるものであることが好ましい。接着テープ２０は、所定のエネルギーを加えることでその接着力が弱められる性質を有するものであってもよい。例えば、接着テープ２０は、紫外線を照射することでその接着力が弱められる、いわゆる紫外線硬化性を有してもよい。あるいは、接着テープ２０は、熱硬化性又は熱可塑性など性質を有するものであってもよく、これらに限定されない。
【００４０】
図１及び図２に示すように、半導体チップ１０が一方の面に貼り付けられた接着テープ２０を、ステージ３０上に載置して、接着テープ２０の他方の面でステージ３０に吸着させる。ここで、ステージ３０は、接着テープ２０を支える支持面３２と、支持面３２に接着テープ２０を吸着させる吸引孔３４と、を有する。
【００４１】
ステージ３０の支持面３２は、接着テープ２０における半導体チップ１０を向く側とは反対側の面を支持する。支持面３２は、接着テープ２０に貼り付けられた１つ又は複数の半導体チップ１０を載置する領域を有する。例えば、複数の半導体チップ１０を、接着テープ２０を介して同時にステージ３０上に載置した場合は、複数の半導体チップ１０に対して後述する工程をまとめて行うことができる。
【００４２】
図１に示すように、支持面３２は荒れた面となっている。詳しくは、支持面３２には複数の突起３６が形成されている。複数の突起３６は、支持面３２において２次元的に広がって形成されている。詳しくは、複数の突起３６は、接着テープ２０を支持面３２に吸着したときに、半導体チップ１０が傾くことを妨げる程度の小さな間隔で２次元的に広がって形成されている。この場合に、複数の突起３６は、突起間の距離がほぼ同一周期で２次元的に広がって形成されてもよい。ほぼ同一周期で形成されていれば、バランス良く接着テープ２０を吸着できるので、半導体チップ１０が傾くことを妨げることができる。
【００４３】
このように形成された複数の突起３６によれば、接着テープ２０を支持面３２に吸着させたときに、例えば、半導体チップ１０を、一対の突起３６の間にその端部が入り込まないようにして、接着テープ２０上に平坦に保持できる（図２参照）。
【００４４】
複数の突起３６は、その上端部が接着テープ２０を突き破らない形状であることが好ましい。また、一対の突起３６の間における深さは限定されない。例えば、図２に示すように、支持面３２の突起間は、接着テープ２０を吸着させたときに、接着テープ２０が支持面３２の突起間に吸い付く程度に浅く形成されてもよい。
【００４５】
複数の突起３６は、支持面３２が砥粒材で削られることによって形成されてもよい。例えば、複数の突起３６は、支持面３２の表面に砥粒材が吹きつけられて形成されてもよい。複数の突起３６は、ブラスト処理によって形成されてもよい。これによれば、例えば、一様に細かく複数の突起３６が並んだ支持面３２を形成できるので、バランス良く接着テープ２０を吸着できる。したがって、接着テープ２０をステージ３０に吸着させたときに半導体チップ１０が傾くことを妨げることができる。
【００４６】
吸引孔３４は、支持面３２に１つ又は複数形成されている。吸引孔３４は、接着テープ２０と支持面３２との間を真空（大気圧より小さい圧力）にして、接着テープ２０を支持面３２に吸着させるための孔である。吸引孔３４の孔の大きさは限定されない。また、支持面３２の平面視おける吸引孔３４の配置は限定されない。
【００４７】
図１に示すように、接着テープ２０をステージ３０に吸着させる工程を終える前に、所定のエネルギーを加えて、接着テープ２０と半導体チップ１０との接着力を弱めてもよい。この工程は、接着テープ２０をステージ３０に載置する前に別ステージで行ってもよい。所定のエネルギーとして、例えば、接着テープ２０に紫外線２２を照射して両者の接着力を弱めてもよい。この工程によれば、接着テープ２０を、半導体チップ１０との接着力を弱めて、ステージ３０の支持面３２に容易に吸着させることができる。すなわち、後述する工程において、半導体チップ１０に加えられるストレスをより小さく抑えて、より容易に半導体チップ１０を接着テープ２０から剥離できる。
【００４８】
図２に示すように、接着テープ２０をステージ３０の支持面３２に吸着させる。接着テープ２０と支持面３２との間を、吸引孔３４で気体を吸い込むことで真空にして、接着テープ２０を支持面３２に吸着させる。詳しく説明すると、まず、吸引孔３４によって気体を吸い込む前は、図１に示すように、接着テープ２０は支持面３２の複数の突起３６によって支持される。その後、図２に示すように、気体を吸い込むことで、接着テープ２０を、複数の突起３６で支持しつつ、突起間において半導体チップ１０から剥がす。すなわち、複数の突起３６を作用点として、突起間において接着テープ２０を半導体チップ１０から剥がす。例えば、複数の突起が低く形成され突起間の深さが浅い場合には、図２に示すように、接着テープ２０は支持面３２の表面の凹凸形状に合わせて吸着される。
【００４９】
こうして、接着テープ２０は、半導体チップ１０から部分的に剥がされて、半導体チップ１０に対する保持力が極めて小さくなる。その後、半導体チップ１０を接着テープ２０から分離する。
【００５０】
例えば、図３に示すように、半導体チップ１０を、接着テープ２０とは反対側で吸着し、接着テープ２０とは反対方向に持ち上げることによって分離してもよい。この場合に、ツール４０を使用して、半導体チップ１０を接着テープ２０から分離してもよい。図３に示す例では、ツール４０を、半導体チップ１０の面の内側を避けて外周に接触させる。この場合のツール４０は、角錐コレットであってもよい。これによれば、特に、半導体チップ１０の接着テープ２０とは反対側の面が電極１２を有する面である場合に、その面を傷つけずにツール４０を半導体チップ１０に接触させることができるので効果的である。あるいは、半導体チップ１０の面のうち、少なくとも一部（面の全部又は一部）にツールを接触させてもよい。
【００５１】
図３に示すように、半導体チップ１０にツール４０を接触させることによって、ツール４０と半導体チップ１０の面との間に空間４２が設けられ、空間４２の気体を吸い込むことで半導体チップ１０を吸着する。この場合に、空間４２に連通するツール４０の穴４４を介して、気体を吸い込んでもよい。接着テープ２０はステージ３０に吸着されて部分的に半導体チップ１０から剥がされているので、ツール４０によって半導体チップ１０を接着テープ２０から容易に分離できる。また、接着テープ２０の接着力が所定のエネルギーによって既に弱められている場合には、半導体チップ１０にさらにストレスを加えることなく分離できる。また、接着テープ２０を吸着する支持面３２は、半導体チップ１０が傾くことを妨げるようになっているので、半導体チップ１０を水平に保った状態で分離できる。したがって、半導体チップ１０を傷つけることなく、確実に吸着できる。なお、半導体チップ１０を接着テープ２０から分離するときに、継続してステージ３０によって接着テープ２０を吸着させ続けていてもよい。
【００５２】
これまでの工程によれば、半導体チップ１０を、例えば接着テープ２０越しにピンによって突き上げることなく、接着テープ２０から剥離することができる。これによって、突き上げピンによる調整及び管理等の手間をなくすことができる。また、ピンで突き上げることによる半導体チップ１０への直接的なストレスをなくすことができる。したがって、例えば、薄く割れやすい半導体チップであっても、容易に半導体装置を製造できる。
【００５３】
図４は、半導体チップ１０を所定の搭載領域に搭載する方法を示す図である。以下に示す工程では、半導体チップ１０を所定の搭載領域に搬送し、半導体チップ１０を搭載する。
【００５４】
半導体チップ１０を搬送する工程は、上述の工程に引き続いて行ってもよい。すなわち、図３に示すように、ツール４０によって、半導体チップ１０を吸着して接着テープ２０から分離し、そのまま所定の搭載領域に搬送してもよい。あるいは、本工程は、上述の工程に続くものでなく、改めて半導体チップ１０を吸着して所定の搭載領域に搬送する工程であってもよい。
【００５５】
図４に示すように、半導体チップ１０を所定の搭載領域に搭載する。所定の搭載領域は、例えば基板５０であってもよい。ここで、基板５０は、有機系又は無機系のいずれの材料によって形成されてもよい。基板５０の一例として、例えばポリイミド樹脂からなるフレキシブル基板であってもよく、又はセラミック、ガラスもしくはガラスエポキシなどのものであってもよい。また、基板５０として、多層基板やビルドアップ型基板を用いてもよい。なお、基板５０には配線パターン５２が形成されている。
【００５６】
図４に示すように、台６０上に用意した基板５０に、半導体チップ１０を搭載する。半導体チップ１０の搭載は、少なくとも半導体チップ１０を基板５０に向けて押圧することで行う。本実施の形態では、半導体チップ１０の搭載は、気体の圧縮によって、半導体チップ１０の面を押圧して行う。
【００５７】
詳しく説明すると、まず、ツール４０に吸着させた状態で半導体チップ１０を基板５０上に載せる。その後、半導体チップ１０の吸着を解除し、逆に半導体チップ１０を気体の圧縮によって押圧する。気体の圧縮で押圧するときには、ツール４０によって、半導体チップ１０を基板５０の所定の搭載領域からずれない程度の微小な力で押圧してもよい。言い換えると、ツール４０は、半導体チップ１０との間の空間４２に、安定して気体を送り込むことができる程度の最低限の力で、半導体チップ１０を押圧してもよい。
【００５８】
半導体チップ１０の吸着又は押圧は、ツール４０と半導体チップ１０の面との間の空間４２に、気体を強制的に出し入れさせて行う。詳しくは、吸着時は、空間４２に連通するツール４０の穴４４を介して気体を吸い込んで、半導体チップ１０を吸着する。吸着から押圧への切り替えは、半導体チップ１０を基板５０に載せた後に、気体の吸い込みを止めて、逆に穴４４を介して空間４２に気体を送り込み、空間４２において真空状態から真空破壊を起こさせる。その後、さらに継続して空間４２に気体を送り込んで、空間４２において気体を圧縮させて半導体チップ１０の面を押圧する。吸着及び押圧は、気体の出し入れを制御すればよいので、１つのツール４０によってこれらの工程を行うことができる。したがって、一連の工程として素早く半導体チップ１０を搬送及び搭載できる。
【００５９】
空間４２に対して気体を出し入れする機構として、ツール４０の穴４４に接続されたパイプ（図示しない）を使用して気体の出し入れを制御してもよい。例えば、気体を吸い込むためのパイプと、気体を送り込むためのパイプと、を穴４４に接続する前に合流させて、合流させた１つのパイプによって空間４２に気体を出し入れさせてもよい。この場合に、気体とともにゴミを空間４２に送り込まないように、双方のパイプが合流する前の地点で各パイプにフィルターを取り付けることが好ましい。これによって、気体を吸い込むことでパイプ内に入ったゴミを、逆流して空間４２に送り込むことを妨げることができる。したがって、半導体チップ１０がゴミの吹きつけによって傷つけられることを防止できる。
【００６０】
半導体チップ１０を気体の圧縮によって押圧することで、半導体チップ１０の面を、部分的に偏ることなくほぼ均一に押圧できる。さらに、例えば、ツール４０を、バネ４６などの弾性力を有する機構によって半導体チップ１０に対して一定の力で押圧させたときには、気体の圧縮による押圧力に左右されずに、半導体チップ１０をほぼ一定の荷重で押圧できる。詳しくは、気体の圧縮による押圧力が一定以上になっても、半導体チップ１０に働く反作用によって、バネ４６における半導体チップ１０を押圧する力が小さくなり、全体として初期の設定値を変化させることなく半導体チップ１０をほぼ一定の荷重で押圧できる。したがって、押圧時の気体の供給量等を多少ばらつかせても、一定の荷重で半導体チップ１０を搭載できる。これによって、一定以上のストレスを加えることによって半導体チップ１０を割ってしまうことがない。したがって、これによれば半導体チップ１０が薄くて割れやすい場合に特に有効である。
【００６１】
なお、半導体チップ１０の搭載時において、半導体チップ１０を押圧するとともに例えば熱をさらに加えてもよい。また、半導体チップ１０を押圧する気体は、例えば空気又はガスであってもよく、これらに限定されない。
【００６２】
図４に示すように、半導体チップ１０の吸着又は押圧は、半導体チップ１０の電極１２が形成された側の面に対して行ってもよい。言い換えると、半導体チップ１０を電極１２が形成された側の面から吸着して搬送し、半導体チップ１０の電極１２が形成された側の面を気体の圧縮で押圧して、それとは反対側の面を基板５０に対向させて搭載してもよい。これによれば、その信頼性に最も影響する半導体チップ１０における電極１２が形成された面に、直接的にストレスを加えることなく、半導体チップ１０を搭載できる。
【００６３】
また、半導体チップ１０を、接着剤５４を介して基板５０に搭載してもよい。例えば、接着剤５４は、予め半導体チップ１０の搭載面に設けておいてもよい。あるいは、基板５０上に設けておいてもよい。なお、接着剤５４は、ペースト状、あるいはシート状のものを使用することができる。
【００６４】
これまでの工程によれば、気体の圧縮によって半導体チップ１０を押圧するので、直接的に半導体チップ１０の面をツールで押圧する必要がない。これによって、半導体チップ１０を傷つけることなく搭載できる。また、気体の圧縮によって押圧するので、半導体チップ１０に搭載に必要な応力をほぼ均一に加えることができる。したがって、例えば、半導体チップ１０を搭載領域との間に気泡残さずに確実に搭載できる。
【００６５】
図５は、本実施の形態における製造方法によって製造された半導体装置の一例を示す図である。半導体装置１は、半導体チップ１０と、基板５０と、外部端子８０と、を含む。
【００６６】
半導体チップ１０は、電極１２を有する側とは反対側の面が基板５０に対向して搭載されている。複数の電極１２は、ワイヤ１４によって配線パターン５２に電気的に接続されている。図５に示す半導体装置１は、ワイヤボンディング型のＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）又はＣＳＰ（Ｃｈｉｐ Ｓｃａｌｅ／Ｓｉｚｅ Ｐａｃｋａｇｅ）などのパッケージに分類できる。
【００６７】
半導体チップ１０は、樹脂７０によって封止されている。樹脂７０は、図示しない金型を使用して成型してもよい。
【００６８】
半導体装置１は外部端子８０を有する。図５に示す例では、外部端子８０としてボール状のバンプが形成されている。外部端子８０は、例えばハンダボールであってもよい。半導体チップ１０と電気的に接続する配線パターン５２を所定の配置に引き回すことで、外部端子８０を基板５０における２次元的に広がる領域に設けることができる。すなわち、半導体装置の外部端子８０のピッチを変換して、例えば回路基板（マザーボード）への搭載を容易に行うことができる。
【００６９】
外部端子５０のその他の形態として、基板５０の配線パターン５２の一部を延出し、そこから外部接続を図るようにしてもよい。配線パターン５２の一部をコネクタのリードとしたり、コネクタを基板５０上に実装してもよい。さらに、積極的に外部端子８０を形成せず回路基板への実装時に回路基板側に塗布されるハンダクリームを利用し、その溶融時の表面張力で結果的に外部端子を形成してもよい。その半導体装置は、いわゆるランドグリッドアレイ型の半導体装置である。
【００７０】
本実施の形態における半導体装置によれば、その製造工程において半導体チップ１０に加えられるストレスを抑えることができるので、信頼性の高い半導体装置を提供できる。
【００７１】
本実施の形態における半導体装置の製造装置は、図１〜図３に示すように、半導体チップ１０が一方の面に貼り付けられた接着テープ２０を他方の面で吸着するステージ３０を含む。ステージ３０は、接着テープ２０を支える支持面３２と、支持面３２に接着テープ２０を吸着させる吸引孔３４と、を有する。支持面３２及び吸引孔３４の説明は上述の通りである。なお、本実施の形態における半導体装置の製造装置の効果は、製造方法において説明した通りである。
【００７２】
図６には、本実施の形態に係る半導体装置１を実装した回路基板９０が示されている。回路基板９０には例えばガラスエポキシ基板等の有機系基板を用いることが一般的である。回路基板９０には例えば銅などからなる配線パターンが所望の回路となるように形成されていて、それらの配線パターンと半導体装置１の外部端子８０とを機械的に接続することでそれらの電気的導通を図る。
【００７３】
そして、本発明を適用した半導体装置を有する電子機器として、図７にはノート型パーソナルコンピュータ１００、図８には携帯電話１１０が示されている。
【図面の簡単な説明】
【図１】図１は、本実施の形態に係る半導体装置の製造方法及びその製造装置を示す図である。
【図２】図２は、本実施の形態に係る半導体装置の製造方法及びその製造装置を示す図である。
【図３】図３は、本実施の形態に係る半導体装置の製造方法及びその製造装置を示す図である。
【図４】図４は、本実施の形態に係る半導体装置の製造方法を示す図である。
【図５】図５は、本実施の形態に係る製造方法によって製造された半導体装置を示す図である。
【図６】図６は、本実施の形態に係る半導体装置が実装された回路基板を示す図である。
【図７】図７は、本実施の形態に係る半導体装置を有する電子機器を示す図である。
【図８】図８は、本実施の形態に係る半導体装置を有する電子機器を示す図である。
【符号の説明】
１０ 半導体チップ
１２ 電極
２０ 接着テープ
２２ 紫外線
３０ ステージ
３２ 支持面
３６ 突起
４０ ツール
４２ 空間[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a manufacturing method thereof, a semiconductor device manufacturing apparatus, a circuit board, and an electronic apparatus.
[0002]
BACKGROUND OF THE INVENTION
In recent years, semiconductor chips have been made thinner in order to realize a high-density semiconductor device. As a result, handling of semiconductor chips is more difficult at the time of manufacture than ever before.
[0003]
For example, when a semiconductor chip cut into individual pieces on an adhesive tape is handled before being mounted on a substrate, the semiconductor chip may be broken by stress applied directly to the semiconductor chip. It was.
[0004]
The present invention is for solving this problem, and an object thereof is to a semiconductor device excellent in handling of a semiconductor chip and a manufacturing method thereof, a semiconductor device manufacturing apparatus, a circuit board, and an electronic apparatus.
[0005]
[Means for Solving the Problems]
(1) A method of manufacturing a semiconductor device according to the present invention includes:
Including a step of adhering an adhesive tape having a semiconductor chip having an electrode attached to one surface to a stage on the other surface;
On the support surface that adsorbs the adhesive tape of the stage, Formed by cutting with abrasives Multiple protrusions spread in two dimensions Cage ,
In the step of adsorbing the adhesive tape to the stage, the adhesive tape is supported by the plurality of protrusions and is peeled from the semiconductor chip between the protrusions.
[0006]
According to the present invention, the semiconductor chip can be peeled off from the adhesive tape without being pushed up by a pin through the adhesive tape, for example. As a result, it is possible to eliminate the trouble of adjustment and management by the push-up pin. Further, direct stress on the semiconductor chip due to pushing up with pins can be eliminated. Therefore, for example, even if the semiconductor chip is thin and easily broken, the semiconductor device can be easily manufactured.
[0007]
(2) In this method of manufacturing a semiconductor device, the protrusion may be formed by scraping the support surface of the stage with an abrasive material.
[0008]
According to this, for example, the adhesive tape can be adsorbed on the support surface on which a plurality of protrusions are uniformly arranged, so that the adhesive tape can be adsorbed with a good balance. Accordingly, the semiconductor chip can be prevented from being inclined when the adhesive tape is adsorbed to the stage, and the semiconductor chip can be effectively peeled off from the adhesive tape.
[0009]
(3) In this method of manufacturing a semiconductor device, the adhesive tape has a property that its adhesive force is weakened by applying predetermined energy,
Before finishing the step of adsorbing the adhesive tape to the stage, the method may further include a step of applying the energy to the adhesive tape to weaken an adhesive force between the adhesive tape and the semiconductor chip.
[0010]
As a result, the adhesive tape can be more easily peeled off from the semiconductor chip.
[0011]
(4) In this method of manufacturing a semiconductor device, the adhesive tape has a property that its adhesive strength is weakened by irradiating with ultraviolet rays.
The step of weakening the adhesive force may be a step of weakening the adhesive force between the adhesive tape and the semiconductor chip by irradiating the adhesive tape with ultraviolet rays.
[0012]
As a result, the adhesive tape can be more easily peeled off from the semiconductor chip.
[0013]
(5) In this method of manufacturing a semiconductor device, after the step of adsorbing the adhesive tape to the stage,
The method may further include a step of adsorbing the semiconductor chip on the side opposite to the adhesive tape and separating the semiconductor chip from the adhesive tape.
[0014]
According to this, since the support surface of the stage prevents the semiconductor chip from being inclined at the time of suction, it can be easily sucked on the side opposite to the adhesive tape without damaging the semiconductor chip.
[0015]
(6) In this method of manufacturing a semiconductor device, after the step of separating the semiconductor chip from the adhesive tape,
The semiconductor chip may be further transferred to a predetermined mounting area in an adsorbed state, released from the adsorption, and pressed by gas compression to be mounted on the mounting area.
[0016]
According to this, since the semiconductor chip is pressed by gas compression, it is not necessary to directly press the surface of the semiconductor chip with a tool. As a result, the semiconductor chip can be mounted without being damaged. Moreover, since it presses by compression of gas, the stress required for mounting to a semiconductor chip can be applied substantially uniformly. Therefore, for example, the semiconductor chip can be reliably mounted without leaving bubbles between the mounting area.
[0017]
(7) In this method of manufacturing a semiconductor device, the adhesive tape is affixed to the surface of the semiconductor chip opposite to the side on which the electrodes are formed,
In the step of separating and transporting the semiconductor chip, the semiconductor chip is adsorbed from the surface on which the electrode is formed,
In the step of mounting the semiconductor chip, the surface of the semiconductor chip on the side on which the electrode is formed is pressed by gas compression, and the surface of the semiconductor chip on the side opposite to the side on which the electrode is formed is You may mount facing the said mounting area | region.
[0018]
Thereby, the semiconductor chip can be mounted without damaging the surface of the semiconductor chip on which the electrode is formed.
[0019]
(8) In this method of manufacturing a semiconductor device, the tool and the electrode in the semiconductor chip are formed by contacting a tool on the outer periphery of the semiconductor chip, avoiding the inside of the surface on which the electrode is formed. A space may be provided between the surface of the semiconductor chip and the semiconductor chip may be adsorbed or pressed by forcing gas into and out of the space.
[0020]
According to this, the semiconductor chip can be adsorbed or pressed only by letting gas in and out of the space between the tool and the surface of the semiconductor chip. This allows these steps to be performed with a single tool. Therefore, the semiconductor chip can be transported and mounted quickly as a series of processes. Moreover, since the tool contacts the outer periphery of the surface of the semiconductor chip, it can be transported and mounted without damaging the surface of the semiconductor chip.
[0027]
( 9 The semiconductor device according to the present invention is manufactured by the method for manufacturing a semiconductor device.
[0028]
( 10 The circuit board according to the present invention is mounted with the semiconductor device.
[0029]
( 11 The electronic device according to the present invention includes the above semiconductor device.
[0030]
( 12 The semiconductor device manufacturing apparatus according to the present invention
Including a stage for adsorbing the adhesive tape with the semiconductor chip attached to one surface on the other surface;
The stage has a support surface for supporting the adhesive tape, and a suction hole for adsorbing the adhesive tape to the support surface,
On the support surface of the stage, Formed by cutting with abrasives Multiple protrusions spread in two dimensions Have .
[0031]
According to the present invention, when the adhesive tape is peeled off from the semiconductor chip, the semiconductor chip can be peeled off from the adhesive tape without being pushed up by, for example, a pin through the adhesive tape. As a result, it is possible to eliminate the trouble of adjustment and management by the push-up pin. Further, direct stress on the semiconductor chip due to pushing up with pins can be eliminated. Therefore, for example, even if the semiconductor chip is thin and easily broken, an apparatus capable of easily manufacturing a semiconductor device can be provided.
[0032]
( 13 In this semiconductor device manufacturing apparatus, the protrusion may be formed by scraping the support surface of the stage with an abrasive material.
[0033]
According to this, when the adhesive tape is peeled from the semiconductor chip, for example, the adhesive tape can be adsorbed on the support surface on which a plurality of protrusions are uniformly arranged, so that the adhesive tape can be adsorbed with a good balance. Accordingly, the semiconductor chip can be prevented from being inclined when the adhesive tape is adsorbed to the stage, and the semiconductor chip can be effectively peeled off from the adhesive tape.
[0034]
DETAILED DESCRIPTION OF THE INVENTION
Preferred embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following embodiments.
[0035]
1 to 3 are diagrams showing a semiconductor device manufacturing method and a manufacturing apparatus thereof according to the present embodiment. FIG. 4 is a diagram showing a method for manufacturing the semiconductor device according to the present embodiment.
[0036]
In the present embodiment, a semiconductor chip 10 is prepared. The semiconductor chip 10 may be formed by cutting a semiconductor wafer (not shown) into individual pieces. The outer shape of the semiconductor chip 10 is often rectangular, but is not limited thereto. The semiconductor chip 10 has a plurality of electrodes 12. The electrode 12 is an electrode of an integrated circuit formed inside the semiconductor chip 10. The electrode 12 may be formed on the surface (active surface) of the semiconductor chip 10 having the integrated circuit. The electrode 12 may be arranged at the end of the surface of the semiconductor chip 10 or may be arranged at the center. The electrode 12 is made of, for example, aluminum. In the semiconductor chip 10, a passivation film (not shown) may be formed on the surface on which the electrode 12 is formed.
[0037]
As shown in FIG. 1, the semiconductor chip 10 is affixed to an adhesive tape 20. For example, the adhesive tape 20 may be used when cutting a semiconductor wafer. Specifically, the adhesive tape 20 may be affixed to the surface of the semiconductor wafer on the side opposite to the side to be cut and directly attached to the plurality of semiconductor chips 10 after cutting. In many cases, the surface of the semiconductor wafer having the electrode 12 is a cut surface. In this case, as shown in FIG. 1, the adhesive tape 20 is different from the surface of the semiconductor chip 10 on which the electrode 12 is formed. Affixed to the opposite side. In this case, the adhesive tape 20 may be referred to as a dicing tape.
[0038]
Alternatively, the adhesive tape 20 may be attached to the surface of the semiconductor chip 10 on which the electrode 12 is formed. In the present embodiment, the adhesive tape 20 may be affixed to the semiconductor chip 10 after cutting the semiconductor wafer, for example.
[0039]
For example, the adhesive tape 20 is preferably one that can reliably bond the semiconductor chip 10 that has been separated by cutting the semiconductor wafer and can be easily peeled off in a later step. The adhesive tape 20 may have a property that its adhesive strength is weakened by applying predetermined energy. For example, the adhesive tape 20 may have a so-called ultraviolet curing property in which the adhesive strength is weakened by irradiating ultraviolet rays. Or adhesive tape 20 may have properties, such as thermosetting or thermoplasticity, and is not limited to these.
[0040]
As shown in FIGS. 1 and 2, the adhesive tape 20 with the semiconductor chip 10 attached to one surface is placed on the stage 30 and is adsorbed to the stage 30 on the other surface of the adhesive tape 20. Here, the stage 30 includes a support surface 32 that supports the adhesive tape 20 and a suction hole 34 that attracts the adhesive tape 20 to the support surface 32.
[0041]
The support surface 32 of the stage 30 supports the surface of the adhesive tape 20 opposite to the side facing the semiconductor chip 10. The support surface 32 has a region on which one or more semiconductor chips 10 attached to the adhesive tape 20 are placed. For example, when a plurality of semiconductor chips 10 are simultaneously placed on the stage 30 via the adhesive tape 20, the steps described below can be performed collectively on the plurality of semiconductor chips 10.
[0042]
As shown in FIG. 1, the support surface 32 is a rough surface. Specifically, a plurality of protrusions 36 are formed on the support surface 32. The plurality of protrusions 36 are formed to extend two-dimensionally on the support surface 32. Specifically, the plurality of protrusions 36 are formed to expand two-dimensionally at a small interval that prevents the semiconductor chip 10 from being tilted when the adhesive tape 20 is attracted to the support surface 32. In this case, the plurality of protrusions 36 may be formed such that the distance between the protrusions spreads two-dimensionally with substantially the same period. If formed with substantially the same period, the adhesive tape 20 can be adsorbed in a well-balanced manner, so that the semiconductor chip 10 can be prevented from tilting.
[0043]
According to the plurality of protrusions 36 formed in this way, when the adhesive tape 20 is attracted to the support surface 32, for example, the semiconductor chip 10 is prevented from entering between the pair of protrusions 36. Thus, it can be held flat on the adhesive tape 20 (see FIG. 2).
[0044]
It is preferable that the plurality of protrusions 36 have a shape in which the upper end portions do not break through the adhesive tape 20. Further, the depth between the pair of protrusions 36 is not limited. For example, as shown in FIG. 2, the protrusions on the support surface 32 may be formed shallow enough to attract the adhesive tape 20 between the protrusions on the support surface 32 when the adhesive tape 20 is adsorbed.
[0045]
The plurality of protrusions 36 may be formed by scraping the support surface 32 with an abrasive material. For example, the plurality of protrusions 36 may be formed by spraying an abrasive on the surface of the support surface 32. The plurality of protrusions 36 may be formed by blasting. According to this, for example, since the support surface 32 in which the plurality of protrusions 36 are arranged uniformly and finely can be formed, the adhesive tape 20 can be adsorbed with a good balance. Therefore, it is possible to prevent the semiconductor chip 10 from being inclined when the adhesive tape 20 is attracted to the stage 30.
[0046]
One or a plurality of suction holes 34 are formed in the support surface 32. The suction hole 34 is a hole for adsorbing the adhesive tape 20 to the support surface 32 by making a vacuum (pressure less than atmospheric pressure) between the adhesive tape 20 and the support surface 32. The size of the suction hole 34 is not limited. Further, the arrangement of the suction holes 34 in the plan view of the support surface 32 is not limited.
[0047]
As shown in FIG. 1, a predetermined energy may be applied to weaken the adhesive force between the adhesive tape 20 and the semiconductor chip 10 before finishing the step of adsorbing the adhesive tape 20 to the stage 30. This step may be performed on a separate stage before the adhesive tape 20 is placed on the stage 30. As the predetermined energy, for example, the adhesive tape 20 may be irradiated with ultraviolet rays 22 to weaken the adhesive force between them. According to this step, the adhesive tape 20 can be easily adsorbed to the support surface 32 of the stage 30 by weakening the adhesive force with the semiconductor chip 10. That is, in the process described later, the stress applied to the semiconductor chip 10 can be suppressed to be smaller, and the semiconductor chip 10 can be more easily peeled from the adhesive tape 20.
[0048]
As shown in FIG. 2, the adhesive tape 20 is attracted to the support surface 32 of the stage 30. A vacuum is created by sucking gas through the suction holes 34 between the adhesive tape 20 and the support surface 32, and the adhesive tape 20 is adsorbed to the support surface 32. More specifically, first, before the gas is sucked through the suction holes 34, the adhesive tape 20 is supported by the plurality of protrusions 36 on the support surface 32 as shown in FIG. Thereafter, as shown in FIG. 2, by sucking gas, the adhesive tape 20 is peeled from the semiconductor chip 10 between the protrusions while being supported by the plurality of protrusions 36. That is, the adhesive tape 20 is peeled from the semiconductor chip 10 between the protrusions with the plurality of protrusions 36 as the action points. For example, when the plurality of protrusions are formed low and the depth between the protrusions is shallow, the adhesive tape 20 is adsorbed according to the uneven shape of the surface of the support surface 32 as shown in FIG.
[0049]
Thus, the adhesive tape 20 is partially peeled off from the semiconductor chip 10 and the holding force with respect to the semiconductor chip 10 becomes extremely small. Thereafter, the semiconductor chip 10 is separated from the adhesive tape 20.
[0050]
For example, as shown in FIG. 3, the semiconductor chip 10 may be separated by adsorbing on the side opposite to the adhesive tape 20 and lifting in the direction opposite to the adhesive tape 20. In this case, the semiconductor chip 10 may be separated from the adhesive tape 20 using the tool 40. In the example shown in FIG. 3, the tool 40 is brought into contact with the outer periphery while avoiding the inside of the surface of the semiconductor chip 10. The tool 40 in this case may be a pyramid collet. According to this, especially when the surface opposite to the adhesive tape 20 of the semiconductor chip 10 is the surface having the electrode 12, the tool 40 can be brought into contact with the semiconductor chip 10 without damaging the surface. It is effective. Alternatively, the tool may be brought into contact with at least a part (all or part of the surface) of the surface of the semiconductor chip 10.
[0051]
As shown in FIG. 3, by bringing the tool 40 into contact with the semiconductor chip 10, a space 42 is provided between the tool 40 and the surface of the semiconductor chip 10, and the semiconductor chip 10 is adsorbed by sucking the gas in the space 42. To do. In this case, gas may be sucked through the hole 44 of the tool 40 communicating with the space 42. Since the adhesive tape 20 is attracted to the stage 30 and partially peeled off from the semiconductor chip 10, the semiconductor chip 10 can be easily separated from the adhesive tape 20 by the tool 40. Further, when the adhesive force of the adhesive tape 20 has already been weakened by a predetermined energy, the semiconductor chip 10 can be separated without further stress. Further, since the support surface 32 that adsorbs the adhesive tape 20 prevents the semiconductor chip 10 from being tilted, the semiconductor chip 10 can be separated while being kept horizontal. Therefore, the semiconductor chip 10 can be reliably adsorbed without damaging it. When the semiconductor chip 10 is separated from the adhesive tape 20, the adhesive tape 20 may be continuously adsorbed by the stage 30.
[0052]
According to the steps so far, the semiconductor chip 10 can be peeled off from the adhesive tape 20 without being pushed up by, for example, a pin through the adhesive tape 20. As a result, it is possible to eliminate the trouble of adjustment and management by the push-up pin. Further, direct stress on the semiconductor chip 10 caused by pushing up with pins can be eliminated. Therefore, for example, even if the semiconductor chip is thin and easily broken, the semiconductor device can be easily manufactured.
[0053]
FIG. 4 is a diagram showing a method for mounting the semiconductor chip 10 in a predetermined mounting area. In the steps shown below, the semiconductor chip 10 is transferred to a predetermined mounting area, and the semiconductor chip 10 is mounted.
[0054]
The step of transporting the semiconductor chip 10 may be performed subsequent to the above-described steps. That is, as shown in FIG. 3, the semiconductor chip 10 may be sucked and separated from the adhesive tape 20 by a tool 40 and conveyed to a predetermined mounting area as it is. Or this process may be a process which does not follow the above-mentioned process, and is a process which adsorbs semiconductor chip 10 anew and conveys it to a predetermined mounting field.
[0055]
As shown in FIG. 4, the semiconductor chip 10 is mounted in a predetermined mounting area. The predetermined mounting area may be the substrate 50, for example. Here, the substrate 50 may be formed of any organic or inorganic material. As an example of the substrate 50, for example, a flexible substrate made of a polyimide resin may be used, or a ceramic, glass, glass epoxy, or the like may be used. Further, as the substrate 50, a multilayer substrate or a build-up substrate may be used. A wiring pattern 52 is formed on the substrate 50.
[0056]
As shown in FIG. 4, the semiconductor chip 10 is mounted on a substrate 50 prepared on a table 60. The semiconductor chip 10 is mounted by pressing at least the semiconductor chip 10 toward the substrate 50. In the present embodiment, the mounting of the semiconductor chip 10 is performed by pressing the surface of the semiconductor chip 10 by gas compression.
[0057]
More specifically, first, the semiconductor chip 10 is placed on the substrate 50 while being adsorbed by the tool 40. Thereafter, the suction of the semiconductor chip 10 is released, and conversely, the semiconductor chip 10 is pressed by gas compression. When pressing by compressing gas, the tool 40 may be used to press the semiconductor chip 10 with a minute force that does not deviate from a predetermined mounting area of the substrate 50. In other words, the tool 40 may press the semiconductor chip 10 with a minimum force capable of stably feeding gas into the space 42 between the tool 40 and the semiconductor chip 10.
[0058]
Adsorption or pressing of the semiconductor chip 10 is performed by forcing gas in and out of the space 42 between the tool 40 and the surface of the semiconductor chip 10. Specifically, at the time of suction, the semiconductor chip 10 is sucked by sucking gas through the hole 44 of the tool 40 communicating with the space 42. To switch from suction to pressing, after the semiconductor chip 10 is placed on the substrate 50, the suction of the gas is stopped, and conversely, the gas is sent to the space 42 through the hole 44, and the vacuum breaks from the vacuum state in the space 42. Let Thereafter, the gas is continuously fed into the space 42 to compress the gas in the space 42 and press the surface of the semiconductor chip 10. Adsorption and pressing can be performed by one tool 40 because the gas can be taken in and out. Therefore, the semiconductor chip 10 can be quickly transported and mounted as a series of steps.
[0059]
As a mechanism for taking gas in and out of the space 42, the gas flow may be controlled using a pipe (not shown) connected to the hole 44 of the tool 40. For example, the pipe for sucking the gas and the pipe for feeding the gas may be joined before being connected to the hole 44, and the gas may be taken in and out by the joined pipe. In this case, it is preferable to attach a filter to each pipe at a point before both pipes join so as not to send dust together with gas into the space 42. Accordingly, it is possible to prevent the dust that has entered the pipe by sucking the gas from flowing backward into the space 42. Therefore, the semiconductor chip 10 can be prevented from being damaged by blowing dust.
[0060]
By pressing the semiconductor chip 10 by gas compression, the surface of the semiconductor chip 10 can be pressed almost uniformly without being partially biased. Further, for example, when the tool 40 is pressed against the semiconductor chip 10 with a certain force by a mechanism having an elastic force such as a spring 46, the semiconductor chip 10 is almost not affected by the pressing force due to gas compression. Can be pressed with a constant load. Specifically, even when the pressing force due to the compression of the gas becomes a certain level or more, the reaction force acting on the semiconductor chip 10 reduces the force of pressing the semiconductor chip 10 in the spring 46 without changing the initial set value as a whole. The semiconductor chip 10 can be pressed with a substantially constant load. Therefore, the semiconductor chip 10 can be mounted with a constant load even if the gas supply amount during pressing is somewhat varied. This prevents the semiconductor chip 10 from being broken by applying a certain level of stress. Therefore, this is particularly effective when the semiconductor chip 10 is thin and easily broken.
[0061]
When the semiconductor chip 10 is mounted, the semiconductor chip 10 may be pressed and, for example, heat may be further applied. Moreover, the gas which presses the semiconductor chip 10 may be air or gas, for example, and is not limited thereto.
[0062]
As shown in FIG. 4, the semiconductor chip 10 may be attracted or pressed against the surface of the semiconductor chip 10 on which the electrode 12 is formed. In other words, the semiconductor chip 10 is sucked and transported from the surface on which the electrode 12 is formed, and the surface of the semiconductor chip 10 on which the electrode 12 is formed is pressed by gas compression, and the opposite side is pressed. The surface may be mounted facing the substrate 50. According to this, the semiconductor chip 10 can be mounted without directly applying stress to the surface of the semiconductor chip 10 that has the greatest influence on the reliability, on which the electrode 12 is formed.
[0063]
Further, the semiconductor chip 10 may be mounted on the substrate 50 through the adhesive 54. For example, the adhesive 54 may be provided in advance on the mounting surface of the semiconductor chip 10. Alternatively, it may be provided on the substrate 50. The adhesive 54 can be a paste or a sheet.
[0064]
According to the steps so far, since the semiconductor chip 10 is pressed by gas compression, it is not necessary to directly press the surface of the semiconductor chip 10 with a tool. Thereby, the semiconductor chip 10 can be mounted without being damaged. Moreover, since it presses by compression of gas, the stress required for mounting to the semiconductor chip 10 can be applied almost uniformly. Therefore, for example, the semiconductor chip 10 can be reliably mounted without leaving bubbles between the mounting area.
[0065]
FIG. 5 is a diagram illustrating an example of a semiconductor device manufactured by the manufacturing method according to the present embodiment. The semiconductor device 1 includes a semiconductor chip 10, a substrate 50, and external terminals 80.
[0066]
The semiconductor chip 10 is mounted with the surface opposite to the side having the electrodes 12 facing the substrate 50. The plurality of electrodes 12 are electrically connected to the wiring pattern 52 by wires 14. The semiconductor device 1 shown in FIG. 5 can be classified into packages such as a wire bonding type BGA (Ball Grid Array) or CSP (Chip Scale / Size Package).
[0067]
The semiconductor chip 10 is sealed with a resin 70. The resin 70 may be molded using a mold (not shown).
[0068]
The semiconductor device 1 has an external terminal 80. In the example shown in FIG. 5, ball-shaped bumps are formed as the external terminals 80. The external terminal 80 may be a solder ball, for example. By routing the wiring pattern 52 electrically connected to the semiconductor chip 10 in a predetermined arrangement, the external terminal 80 can be provided in a two-dimensionally expanding region of the substrate 50. In other words, the pitch of the external terminals 80 of the semiconductor device can be converted and can be easily mounted on, for example, a circuit board (motherboard).
[0069]
As another form of the external terminal 50, a part of the wiring pattern 52 of the substrate 50 may be extended so as to achieve external connection therefrom. A part of the wiring pattern 52 may be used as a connector lead, or the connector may be mounted on the substrate 50. Further, the external terminals 80 may not be positively formed, but a solder cream applied on the circuit board side when mounted on the circuit board may be used to form the external terminals as a result of the surface tension at the time of melting. The semiconductor device is a so-called land grid array type semiconductor device.
[0070]
According to the semiconductor device in the present embodiment, stress applied to the semiconductor chip 10 in the manufacturing process can be suppressed, so that a highly reliable semiconductor device can be provided.
[0071]
As shown in FIGS. 1 to 3, the semiconductor device manufacturing apparatus according to the present embodiment includes a stage 30 that adsorbs the adhesive tape 20 with the semiconductor chip 10 attached to one surface on the other surface. The stage 30 includes a support surface 32 that supports the adhesive tape 20 and a suction hole 34 that causes the support surface 32 to adsorb the adhesive tape 20. The description of the support surface 32 and the suction hole 34 is as described above. The effects of the semiconductor device manufacturing apparatus in the present embodiment are as described in the manufacturing method.
[0072]
FIG. 6 shows a circuit board 90 on which the semiconductor device 1 according to the present embodiment is mounted. As the circuit board 90, an organic substrate such as a glass epoxy substrate is generally used. The circuit board 90 is formed with a wiring pattern made of, for example, copper or the like so as to form a desired circuit, and the wiring pattern and the external terminal 80 of the semiconductor device 1 are mechanically connected to electrically connect them. Ensuring continuity.
[0073]
7 shows a notebook personal computer 100 and FIG. 8 shows a mobile phone 110 as an electronic apparatus having a semiconductor device to which the present invention is applied.
[Brief description of the drawings]
FIG. 1 is a diagram showing a manufacturing method and a manufacturing apparatus for a semiconductor device according to the present embodiment.
FIG. 2 is a diagram illustrating a semiconductor device manufacturing method and a manufacturing apparatus thereof according to the present embodiment.
FIG. 3 is a diagram showing a semiconductor device manufacturing method and a manufacturing apparatus thereof according to the present embodiment.
FIG. 4 is a diagram illustrating a method for manufacturing a semiconductor device according to the present embodiment;
FIG. 5 is a diagram showing a semiconductor device manufactured by the manufacturing method according to the present embodiment.
FIG. 6 is a diagram showing a circuit board on which the semiconductor device according to the present embodiment is mounted.
FIG. 7 is a diagram illustrating an electronic apparatus including the semiconductor device according to the present embodiment.
FIG. 8 is a diagram illustrating an electronic apparatus including the semiconductor device according to the present embodiment.
[Explanation of symbols]
10 Semiconductor chip
12 electrodes
20 Adhesive tape
22 UV
30 stages
32 Support surface
36 projections
40 tools
42 space

Claims (11)

電極を有する半導体チップが一方の面に貼り付けられた接着テープを、その他方の面でステージに吸着させる工程を含み、
前記ステージの前記接着テープを吸着する支持面には、砥粒材で削られることによって形成された複数の突起が２次元的に広がっており、
前記接着テープを前記ステージに吸着させる工程で、前記接着テープを、前記複数の突起で支持して、突起間において前記半導体チップから剥がす半導体装置の製造方法。Including a step of adhering an adhesive tape having a semiconductor chip having an electrode attached to one surface to a stage on the other surface;
A supporting surface for adsorbing the adhesive tape of the stage, a plurality of projections formed by being cut by the abrasive material are spread two-dimensionally,
A method of manufacturing a semiconductor device, wherein in the step of adsorbing the adhesive tape to the stage, the adhesive tape is supported by the plurality of protrusions and is peeled from the semiconductor chip between the protrusions. 請求項１記載の半導体装置の製造方法において、
前記接着テープは、所定のエネルギーを加えることでその接着力が弱められる性質を有し、
前記接着テープを前記ステージに吸着させる工程を終える前に、前記接着テープに前記エネルギーを加えて、前記接着テープと前記半導体チップとの接着力を弱める工程をさらに含む半導体装置の製造方法。In the manufacturing method of the semiconductor device according to claim 1,
The adhesive tape has a property that its adhesive strength is weakened by applying predetermined energy,
A method of manufacturing a semiconductor device, further comprising the step of weakening an adhesive force between the adhesive tape and the semiconductor chip by applying the energy to the adhesive tape before finishing the step of adsorbing the adhesive tape to the stage. 請求項２記載の半導体装置の製造方法において、
前記接着テープは、紫外線を照射することでその接着力が弱められる性質を有し、
前記接着力を弱める工程は、前記接着テープに紫外線を照射して、前記接着テープと前記半導体チップとの接着力を弱める工程である半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 2.
The adhesive tape has the property that its adhesive strength is weakened by irradiating ultraviolet rays,
The step of weakening the adhesive force is a method of manufacturing a semiconductor device, which is a step of irradiating the adhesive tape with ultraviolet rays to weaken the adhesive force between the adhesive tape and the semiconductor chip. 請求項１から請求項３のいずれかに記載の半導体装置の製造方法において、
前記接着テープを前記ステージに吸着させる工程の後に、
前記半導体チップを前記接着テープとは反対側で吸着して、前記半導体チップを前記接着テープから分離する工程をさらに含む半導体装置の製造方法。In the manufacturing method of the semiconductor device in any one of Claims 1-3,
After the step of adsorbing the adhesive tape to the stage,
A method of manufacturing a semiconductor device, further comprising: adsorbing the semiconductor chip on a side opposite to the adhesive tape to separate the semiconductor chip from the adhesive tape. 請求項４記載の半導体装置の製造方法において、
前記半導体チップを前記接着テープから分離する工程の後に、
前記半導体チップを、吸着した状態で所定の搭載領域に搬送し、その吸着を解除するとともに気体の圧縮によって押圧して前記搭載領域に搭載する工程をさらに含む半導体装置の製造方法。In the manufacturing method of the semiconductor device according to claim 4,
After the step of separating the semiconductor chip from the adhesive tape,
A method of manufacturing a semiconductor device, further comprising a step of transporting the semiconductor chip to a predetermined mounting area in an adsorbed state, releasing the adsorption, and pressing the semiconductor chip by gas compression and mounting the semiconductor chip on the mounting area. 請求項５記載の半導体装置の製造方法において、
前記半導体チップは、前記電極が形成された側とは反対側の面において前記接着テープが貼り付けられ、
前記半導体チップを分離及び搬送する工程で、前記半導体チップを前記電極が形成された側の面から吸着し、
前記半導体チップを搭載する工程で、気体の圧縮によって、前記半導体チップの前記電極が形成された側の面を押圧して、前記半導体チップの前記電極が形成された側とは反対側の面を前記搭載領域に対向させて搭載する半導体装置の製造方法。In the manufacturing method of the semiconductor device according to claim 5,
The semiconductor chip has the adhesive tape attached to the surface opposite to the side on which the electrodes are formed,
In the step of separating and transporting the semiconductor chip, the semiconductor chip is adsorbed from the surface on which the electrode is formed,
In the step of mounting the semiconductor chip, the surface of the semiconductor chip on the side on which the electrode is formed is pressed by gas compression so that the surface of the semiconductor chip on the side opposite to the side on which the electrode is formed is A method of manufacturing a semiconductor device mounted opposite to the mounting region. 請求項６記載の半導体装置の製造方法において、
前記半導体チップの前記電極が形成された側の面の内側を避けて外周において、ツールを接触させることによって、前記ツールと前記半導体チップにおける前記電極が形成された側の面との間に空間が設けられ、前記空間に強制的に気体を出し入れさせて、前記半導体チップを吸着又は押圧する半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 6.
A space is provided between the tool and the surface of the semiconductor chip on which the electrode is formed by bringing a tool into contact with the outer periphery of the semiconductor chip so as to avoid the inner surface of the surface on which the electrode is formed. A method of manufacturing a semiconductor device, wherein the semiconductor device is provided, forcing gas into and out of the space to adsorb or press the semiconductor chip. 請求項１から請求項７のいずれかに記載の半導体装置の製造方法によって製造されてなる半導体装置。A semiconductor device manufactured by the method for manufacturing a semiconductor device according to claim 1. 請求項８記載の半導体装置が搭載された回路基板。A circuit board on which the semiconductor device according to claim 8 is mounted. 請求項８記載の半導体装置を有する電子機器。An electronic apparatus having the semiconductor device according to claim 8. 半導体チップが一方の面に貼り付けられた接着テープを、他方の面で吸着するステージを含み、
前記ステージは、接着テープを支える支持面と、前記支持面に接着テープを吸着させる吸引孔と、を有し、
前記ステージの前記支持面には、砥粒材で削られることによって形成された複数の突起が２次元的に広がっている半導体装置の製造装置。Including a stage for adsorbing the adhesive tape with the semiconductor chip attached to one surface on the other surface;
The stage has a support surface for supporting the adhesive tape, and a suction hole for adsorbing the adhesive tape to the support surface,
A semiconductor device manufacturing apparatus in which a plurality of protrusions formed by cutting with an abrasive material are two-dimensionally spread on the support surface of the stage.
JP2000204016A 2000-07-05 2000-07-05 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING DEVICE, CIRCUIT BOARD AND ELECTRONIC DEVICE Expired - Fee Related JP3610888B2 (en)

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