CN107226453B - MEMS device, preparation method thereof and electronic device - Google Patents
MEMS device, preparation method thereof and electronic device Download PDFInfo
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Abstract
The invention relates to an MEMS device, a preparation method thereof and an electronic device. The method comprises the following steps: providing a bottom wafer, and forming a joint ring on the bottom wafer; forming barrier side walls on two sides of the joint ring, wherein a gap is formed between the barrier side walls and the joint ring, and the height of each barrier side wall is smaller than that of the joint ring; providing a cover wafer and combining the cover wafer and the bottom wafer into a whole; and forming a bonding material layer corresponding to the bonding ring on the cover wafer, and bonding the bonding material layer with the bonding ring and stopping on the barrier side wall so that the edge of the bonding material layer is at least partially overlapped with the contact of the barrier side wall. In the process of bonding the bottom wafer and the cover wafer, the barrier side wall can not only prevent bonding materials (such as alloy) from extruding out, but also prevent the pressing distance of the bonding material layer in the cover wafer.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to an MEMS (micro-electromechanical systems) device, a preparation method thereof and an electronic device.
Background
In order to increase the integration density of semiconductor memory devices, which have been receiving attention due to increasing demands for high-capacity semiconductor memory devices, many different methods have been used in the prior art, such as forming a plurality of memory cells on a single wafer by reducing the wafer size and/or changing the internal structural unit, and for increasing the integration density by changing the cell structure, attempts have been made to reduce the cell area by changing the layout of the active region or changing the cell layout.
In the field of electronic consumption, multifunctional devices are more and more popular with consumers, and compared with devices with simple functions, the manufacturing process of multifunctional devices is more complicated, for example, a plurality of chips with different functions need to be integrated on a circuit board, so that a 3D Integrated Circuit (IC) technology is developed.
Among them, Micro Electro Mechanical Systems (MEMS) have significant advantages in terms of volume, power consumption, weight, and price, and various sensors, such as pressure sensors, acceleration sensors, inertial sensors, and others, have been developed so far.
In the field of MEMS, the fabrication process and packaging process of the MEMS of the prior art generally include: providing a MEMS wafer on which various sensor devices are formed, forming a patterned bonding material layer such as an Al ring on the MEMS wafer, and then aligning the top wafer and the bottom wafer for bonding, the Al may overflow during bonding, thereby causing malfunction of the MEMS device and also causing reliability reduction of the MEMS device.
To solve this problem, the existing method is to grow a SiO2 barrier around the AL ring to prevent the extruded aluminum from contacting the MEMS active structure, which can improve the AL overflow, but cannot improve the bonding ring uniformity.
There is therefore a need for further improvements in the methods of manufacturing MEMS devices described so far, in order to eliminate the above-mentioned problems.
Disclosure of Invention
In this summary, concepts in a simplified form are introduced that are further described in the detailed description. This summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The invention provides a preparation method of an MEMS device, which comprises the following steps:
providing a bottom wafer, and forming a joint ring on the bottom wafer;
forming barrier side walls on two sides of the joint ring, wherein a gap is formed between the barrier side walls and the joint ring, and the height of each barrier side wall is smaller than that of the joint ring;
providing a cover wafer and combining the cover wafer and the bottom wafer into a whole;
and forming a bonding material layer corresponding to the bonding ring on the cover wafer, and bonding the bonding material layer with the bonding ring and stopping on the barrier side wall so that the edge of the bonding material layer is at least partially overlapped with the contact of the barrier side wall.
Optionally, the step of forming the barrier sidewall spacer includes:
forming a barrier side wall material layer on the bottom wafer and the joint ring to cover the bottom wafer and the joint ring;
forming patterned mask layers on the barrier side wall material layers on the two sides of the joint ring;
and etching the barrier side wall material layer by taking the mask layer as a mask to form the barrier side wall.
Optionally, a CMOS device is formed on the bottom wafer, a bottom electrode and a moving electrode are formed above the CMOS device, and a cavity is formed between the moving electrode and the bottom electrode.
Optionally, after the barrier side walls are formed, the method further includes a step of patterning the moving electrode to form a plurality of openings on the moving electrode.
Optionally, the cover wafer is provided, so that the bonding material layer is in contact with the bonding ring and the bonding ring is pressed down to the barrier sidewall to be thermally bonded into a whole.
Optionally, a width of the bonding material layer on the cap wafer is 60 μm or more greater than a width of the bonding ring.
Optionally, the contact overlapping width of the bonding material layer and the barrier side wall is less than 10 μm.
Optionally, the width of the gap between the joint ring and the barrier sidewall is 5-10 μm.
Optionally, the width of the joint ring is 20-25 μm.
The present invention also provides a MEMS device, characterized in that the MEMS device comprises:
a bottom wafer having MEMS devices formed thereon;
a bond ring on the bottom wafer;
barrier side walls which are positioned on two sides of the joint ring on the bottom wafer and have a space with the joint ring, and the height of the barrier side walls is smaller than that of the joint ring;
the cover wafer is jointed with the bottom wafer into a whole;
and a bonding material layer corresponding to the bonding ring is formed on the cover wafer and is bonded with the bonding ring into a whole, and the edge of the bonding material layer is at least partially overlapped with the barrier side walls on two sides of the bonding ring in a contact manner.
Optionally, a width of the bonding material layer on the cap wafer is 60 μm or more greater than a width of the bonding ring.
Optionally, the contact overlapping width of the bonding material layer and the barrier side wall is less than 10 μm.
Optionally, the width of the gap between the joint ring and the barrier sidewall is 5-10 μm.
Optionally, the width of the joint ring is 20-25 μm.
Optionally, a CMOS device is formed on the bottom wafer, a bottom electrode and a moving electrode are formed above the CMOS device, and a cavity is formed between the moving electrode and the bottom electrode.
The invention also provides an electronic device which comprises the MEMS device.
In order to solve the problems in the prior art, the invention provides a preparation method of an MEMS device, wherein blocking side walls are formed on two sides of a joint ring in the method, and the blocking side walls can not only block joint materials (such as alloy) from extruding out, but also block the pressing distance of a joint material layer in a cover wafer in the process of jointing a bottom wafer and the cover wafer.
Drawings
The following drawings of the invention are included to provide a further understanding of the invention. There are shown in the drawings, embodiments and descriptions thereof, which are used to explain the principles and apparatus of the invention. In the drawings, there is shown in the drawings,
FIG. 1 is a flow chart of a process for fabricating a MEMS device according to the present invention;
FIGS. 2a-2f are schematic views of a process for fabricating a MEMS device according to the present invention;
fig. 3 is an external view of an example of a mobile phone handset in the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.
It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it can be directly on, adjacent to, connected or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatial relational terms such as "under," "below," "under," "above," "over," and the like may be used herein for convenience in describing the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
The invention provides a preparation method of an MEMS device for solving the problems in the prior art, which comprises the following steps:
providing a bottom wafer, and forming a joint ring on the bottom wafer;
forming barrier side walls on two sides of the joint ring, wherein a gap is formed between the barrier side walls and the joint ring, and the height of each barrier side wall is smaller than that of the joint ring;
providing a cover wafer, and bonding the cover wafer and the bottom wafer into a whole;
and forming a bonding material layer corresponding to the bonding ring on the cover wafer, and bonding the bonding material layer with the bonding ring and stopping on the barrier side wall so that the edge of the bonding material layer is at least partially overlapped with the contact of the barrier side wall.
According to the invention, a CMOS device is formed on the bottom wafer, a bottom electrode and a moving electrode are formed above the CMOS device, and a cavity is formed between the moving electrode and the bottom electrode.
In the process of bonding the cover wafer and the bottom wafer, the bonding material layer is in contact alignment with the bonding ring, the bonding ring is pressed down to the barrier side wall, and the barrier side wall is integrated through thermal bonding.
In order to achieve the above object, the width of the bonding material layer on the cover wafer is 60 μm (6-2, as shown in fig. 2 f) or more larger than the width of the bonding ring, wherein the width of each side of the bonding material layer is 30 μm (the larger portion is shown as 1 in fig. 2f, i.e. 1 ═ 2)/2) or more larger than the width of the side of the bonding ring corresponding below; the contact overlapping width 5 of the bonding material layer and the barrier side wall is less than 10 mu m; the width 3 of the space between the joint ring and the barrier side wall is 5-10 mu m; the width 4 of the barrier side wall is 20-25 mu m.
In order to solve the problems in the prior art, the invention provides a preparation method of an MEMS device, wherein blocking side walls are formed on two sides of a joint ring in the method, and the blocking side walls can not only block joint materials (such as alloy) from extruding out, but also block the pressing distance of a joint material layer in a cover wafer in the process of jointing a bottom wafer and the cover wafer.
Example one
In order to solve the problems in the prior art, the present invention provides a method for manufacturing an MEMS device, which is further described below with reference to the accompanying drawings.
FIGS. 2a-2f are schematic views illustrating a process for fabricating the MEMS device of the present invention; fig. 3 is an external view of an example of a mobile phone handset in the present invention.
Fig. 1 is a flow chart of a manufacturing process of the MEMS device in the present invention, which specifically includes the following steps:
step S1: providing a bottom wafer, and forming a joint ring on the bottom wafer;
step S2: forming barrier side walls on two sides of the joint ring, wherein a gap is formed between the barrier side walls and the joint ring, and the height of each barrier side wall is smaller than that of the joint ring;
step S3: providing a cover wafer and combining the cover wafer and the bottom wafer into a whole; and forming a bonding material layer corresponding to the bonding ring on the cover wafer, and bonding the bonding material layer with the bonding ring and stopping on the barrier side wall so that the edge of the bonding material layer is at least partially overlapped with the contact of the barrier side wall.
The method is explained in detail below on the basis of the process flow diagram in fig. 1.
Step one is performed to provide a bottom wafer 201 on which a bond ring 205 is formed.
Specifically, as shown in fig. 2a, the bottom wafer 201 may be made of a semiconductor material such as silicon, polysilicon, or SiGe, but is not limited to one.
Optionally, CMOS devices may be formed on the bottom wafer, and the kind of the CMOS devices is not limited to a specific one.
In addition, various MEMS patterns are formed above the CMOS device, and for example, the MEMS device may be a pattern sensor, a pressure sensor, an acceleration sensor, or the like, but is not limited to one.
Specifically, a dielectric layer 202, a bottom electrode 203 and a moving electrode 204 of the MEMS device are formed above the CMOS device, and further, an interconnect structure is formed on both sides of the MEMS device to be electrically connected to the bottom electrode 203.
Optionally, the interconnect structure includes an interconnect device such as a via, but is not limited to a specific one.
A patterned bonding ring 205 is further formed on the bottom wafer 201, wherein the bonding ring 205 is made of a metal material, an alloy, or a doped semiconductor material, for example, but not limited to Al in this embodiment.
Optionally, where the bonding ring 205 is an annular structure, such as the wafer is circular, the bonding ring 205 is an annular layer of bonding material disposed around the edge of the wafer to form a cavity for capacitive sensing after bonding with the cover wafer.
The method for forming the joint ring 205 includes depositing a bonding material, such as Al, on the bottom wafer, forming a mask layer, such as a photoresist layer, on the bonding material layer, exposing and developing, and etching the bonding material layer using the photoresist layer as a mask layer to form the joint ring 205.
Step two is performed, barrier sidewalls 2061 are formed on two sides of the bonding ring, a space is formed between the barrier sidewalls 2061 and the bonding ring 205, and the height of the barrier sidewalls is smaller than the height of the bonding ring.
Specifically, the step of forming the barrier side wall includes:
forming a barrier sidewall material layer 206 on the moving electrode 204 and the bonding ring 205 to cover the moving electrode 204 and the bonding ring 205, as shown in fig. 2 b;
the barrier sidewall material layer 206 is an oxide layer, such as silicon dioxide.
Forming a patterned mask layer 207, such as a photoresist layer, on the barrier sidewall spacer material layer on both sides of the joint ring;
then, the barrier sidewall spacer material layer 206 is etched by using the mask layer 207 as a mask to form a barrier sidewall spacer 2061.
In this step, the barrier sidewall material layer 206 is selectively dry etched, for example, N2 may be selected as the etching atmosphere, and other small amount of gas such as CF may be added at the same time4、CO2、O2The etching pressure can be 50-200mTorr, optionally 100-150mTorr, the power is 200-600W, the etching time is 5-80s, optionally 10-60s, and the gas flow is larger, the N is larger2The flow rate of (b) is 30-300sccm, optionally 50-100 sccm.
Finally, the mask layer is removed, as shown in fig. 2 c.
In this step, a space is provided between the barrier sidewall 2061 and the bonding ring 205, and the width 3 of the space is 5 to 10 μm.
Further, after the formation of the barrier sidewall 2061, the method further includes a step of patterning the moving electrode to form a plurality of openings on the moving electrode.
For example, a mask layer, such as a photoresist layer, is formed on the electrode, then the photoresist layer is exposed and developed to form an opening, and then the electrode is etched using the mask layer as a mask to form an opening on the electrode, as shown in fig. 2 d.
Dry etching is selected for this step, for example, CF can be selected4、CO2、O2、N2One or more of.
Performing a third step, providing a cover wafer 208, and bonding the cover wafer and the bottom wafer into a whole; and forming a bonding material layer corresponding to the bonding ring on the cover wafer, and bonding the bonding material layer with the bonding ring and stopping on the barrier side wall so that the edge of the bonding material layer is at least partially overlapped with the contact of the barrier side wall.
As shown in fig. 2e, a cover wafer 208 is provided and the cover wafer 208 is bonded to the bottom wafer in this step.
The cover wafer 208 is preferably silicon, the top wafer also having a layer of bonding material, such as Ge, formed thereon, and the top and bottom wafers are aligned, such as the bonding ring on the bottom wafer and the bonding material layer of the top wafer, and then bonded together, wherein during bonding molten bonding material reflows into the space between the barrier sidewall and the bonding ring.
In the bonding process, the bonding material layer is in contact alignment with the bonding ring, the bonding ring is pressed down to the barrier side wall, and the barrier side wall is integrated through thermal bonding.
Specifically, in this step, a low melting point bond (Eutectic bond) is selected to bond the cover wafer 208 and the bottom wafer together.
In order to achieve the above object, the width of the bonding material layer on the cover wafer is 60 μm or more larger than the width of the bonding ring (6-2, as shown in fig. 2 f), wherein the width of each side of the bonding material layer is 30 μm or more larger than the width of the side of the bonding ring corresponding below (the larger portion is shown as 1 in fig. 2f, i.e. 1 ═ 6-2)/2) or more; the contact overlapping width 5 of the bonding material layer and the barrier side wall is less than 10 mu m; the width 3 of the space between the joint ring and the barrier side wall is 5-10 mu m; the width 4 of the barrier side wall is 20-25 mu m.
In order to solve the problems in the prior art, the invention provides a preparation method of an MEMS device, wherein blocking side walls are formed on two sides of a joint ring in the method, and the blocking side walls can not only block joint materials (such as alloy) from extruding out, but also block the pressing distance of a joint material layer in a cover wafer in the process of jointing a bottom wafer and the cover wafer.
This completes the description of the steps associated with the fabrication of the MEMS device of embodiments of the present invention. After the above steps, other related steps may also be included, which are not described herein again. Besides the above steps, the preparation method of this embodiment may further include other steps among the above steps or between different steps, and these steps may be implemented by various processes in the prior art, and are not described herein again.
Example two
The present invention is directed to solving the problems of the prior art by providing a MEMS device, which is further described below with reference to the accompanying drawings.
The MEMS device includes:
a bottom wafer 201 having MEMS devices formed thereon;
a bond ring 205 on the bottom wafer;
a cover wafer 208 bonded integrally with the bottom wafer;
and a bonding material layer corresponding to the bonding ring is formed on the cover wafer, the bonding material layer is bonded with the bonding ring, and the edge of the bonding material layer is at least partially overlapped with the barrier side walls on two sides of the bonding ring in a contact manner.
The bottom wafer 201 may be made of a semiconductor material such as silicon, polysilicon, or SiGe, but is not limited to one.
Optionally, CMOS devices may be formed on the bottom wafer, and the kind of the CMOS devices is not limited to a specific one.
In addition, various MEMS patterns are formed above the CMOS device, and for example, the MEMS device may be a pattern sensor, a pressure sensor, an acceleration sensor, or the like, but is not limited to one.
Specifically, a dielectric layer 202, a bottom electrode 203 and a moving electrode 204 of the MEMS device are formed above the CMOS device, and further, an interconnect structure is formed on both sides of the MEMS device to be electrically connected to the bottom electrode 203.
Optionally, the interconnect structure includes an interconnect device such as a via, but is not limited to a specific one.
A patterned bonding ring 205 is further formed on the bottom wafer 201, wherein the bonding ring 205 is made of a metal material, an alloy, or a doped semiconductor material, for example, but not limited to Al in this embodiment.
Optionally, where the bonding ring 205 is an annular structure, such as the wafer is circular, the bonding ring 205 is an annular layer of bonding material disposed around the edge of the wafer to form a cavity for capacitive sensing after bonding with the cover wafer.
An interval is formed between the barrier sidewall 2061 and the bonding ring 205, and the width of the interval is 5 to 10 μm.
Wherein the cover wafer 208 is selected from silicon, the top wafer is also formed with a bonding material layer, such as Ge, and then the top wafer and the bottom wafer are aligned, such as the bonding ring on the bottom wafer and the bonding material layer of the top wafer are aligned and then bonded together, wherein during bonding molten bonding material reflows into the space between the barrier sidewall and the bonding ring.
In the bonding process, the bonding material layer is in contact alignment with the bonding ring, the bonding ring is pressed down to the barrier side wall, and the barrier side wall is integrated through thermal bonding.
In order to achieve the above object, the width of the bonding material layer on the cover wafer is 60 μm or more larger than the width of the bonding ring (6-2, as shown in fig. 2 f), wherein the width of each side of the bonding material layer is 30 μm or more larger than the width of the side of the bonding ring corresponding below (the larger portion is shown as 1 in fig. 2f, i.e., 1 ═ 6-2)/2) or more; the contact overlapping width 5 of the bonding material layer and the barrier side wall is less than 10 mu m; the width 3 of the space between the joint ring and the barrier side wall is 5-10 mu m; the width 4 of the barrier side wall is 20-25 mu m.
In the MEMS device, the two sides of the joint ring are provided with the blocking side walls, and the blocking side walls can block the extrusion of the joint material (such as alloy) and block the pressing distance of the joint material layer in the cover wafer in the process of jointing the bottom wafer and the cover wafer, so that the sensitivity and the performance of the MEMS device are further improved.
EXAMPLE III
The invention also provides an electronic device comprising the MEMS device of the second embodiment, and the MEMS device is prepared according to the method of the first embodiment.
The electronic device of this embodiment may be any electronic product or device, such as a mobile phone, a tablet computer, a notebook computer, a netbook, a game console, a television, a VCD, a DVD, a navigator, a digital photo frame, a camera, a video camera, a recording pen, an MP3, an MP4, a PSP, and the like, and may also be any intermediate product including a circuit. The electronic device of the embodiment of the invention has better performance due to the use of the circuit.
Wherein figure 3 shows an example of a mobile telephone handset. The mobile phone handset 200 is provided with a display portion 202, operation buttons 203, an external connection port 204, a speaker 205, a microphone 206, and the like, which are included in a housing 201.
Wherein the mobile phone handset comprises the MEMS device of embodiment one, the MEMS device comprising: a bottom wafer 201 having MEMS devices formed thereon; a bond ring 205 on the bottom wafer; barrier side walls 2061 which are positioned on the bottom wafer at two sides of the bonding ring and have a space with the bonding ring, and the height of the barrier side walls is less than that of the bonding ring; a cover wafer 208 bonded integrally with the bottom wafer; and a bonding material layer corresponding to the bonding ring is formed on the cover wafer, the bonding material layer is bonded with the bonding ring, and the edge of the bonding material layer is at least partially overlapped with the barrier side walls on two sides of the bonding ring in a contact manner. In the process of bonding the bottom wafer and the cover wafer, the barrier side wall can not only prevent bonding materials (such as alloy) from extruding out, but also prevent the pressing distance of the bonding material layer in the cover wafer, and further improves the sensitivity and performance of the MEMS device.
The present invention has been illustrated by the above embodiments, but it should be understood that the above embodiments are for illustrative and descriptive purposes only and are not intended to limit the invention to the scope of the described embodiments. Furthermore, it will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that many variations and modifications may be made in accordance with the teachings of the present invention, which variations and modifications are within the scope of the present invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (16)
1. A method of fabricating a MEMS device, the method comprising:
providing a bottom wafer, and forming a joint ring on the bottom wafer;
forming barrier side walls on two sides of the joint ring, wherein a gap is formed between the barrier side walls and the joint ring, and the height of each barrier side wall is smaller than that of the joint ring;
providing a cover wafer and combining the cover wafer and the bottom wafer into a whole;
and forming a bonding material layer corresponding to the bonding ring on the cover wafer, and bonding the bonding material layer with the bonding ring and stopping on the barrier side wall so that the edge of the bonding material layer is at least partially overlapped with the contact of the barrier side wall to prevent the bonding material from overflowing.
2. The method of claim 1, wherein the step of forming the barrier sidewall comprises:
forming a barrier side wall material layer on the bottom wafer and the joint ring to cover the bottom wafer and the joint ring;
forming patterned mask layers on the barrier side wall material layers on the two sides of the joint ring;
and etching the barrier side wall material layer by taking the mask layer as a mask to form the barrier side wall.
3. The method of claim 1, wherein a CMOS device is formed on the bottom wafer, a bottom electrode and a moving electrode are formed over the CMOS device, and a cavity is formed between the moving electrode and the bottom electrode.
4. The method of claim 3, further comprising patterning the moving electrode after forming the barrier sidewalls to form openings in the moving electrode.
5. The method of claim 1, wherein the cover wafer is provided to contact the bonding material layer with the bonding ring and press the bonding ring down to the barrier sidewall for thermal bonding.
6. The method of claim 1, wherein a width of the bonding material layer on the cap wafer is 60 μ ι η or more greater than a width of the bonding ring.
7. The method according to claim 1, wherein the contact overlap width of the bonding material layer and the barrier side wall is less than 10 μm.
8. The method of claim 1, wherein the width of the space between the bonding ring and the barrier sidewall is 5-10 μm.
9. The method of claim 1, wherein the engaging ring has a width of 20 to 25 μm.
10. A MEMS device, comprising:
a bottom wafer (201) on which MEMS devices are formed;
a bond ring on the bottom wafer;
barrier side walls which are positioned on two sides of the joint ring on the bottom wafer and have a space with the joint ring, and the height of the barrier side walls is smaller than that of the joint ring;
the cover wafer is jointed with the bottom wafer into a whole;
and a bonding material layer corresponding to the bonding ring is formed on the cover wafer and is bonded with the bonding ring into a whole, and the edge of the bonding material layer is at least partially overlapped with the contact of the blocking side walls on two sides of the bonding ring so as to block the overflow of the bonding material.
11. The MEMS device, as recited in claim 10, wherein a width of the bonding material layer on the cap wafer is 60 μ ι η or more greater than a width of the bonding ring.
12. The MEMS device, as recited in claim 10, wherein a contact overlap width of the bonding material layer and the barrier sidewall is less than 10 μm.
13. The MEMS device of claim 10, wherein the width of the space between the bonding ring and the barrier sidewall is 5-10 μm.
14. The MEMS device of claim 10, wherein the bonding ring has a width of 20-25 μm.
15. The MEMS device, as recited in claim 10, wherein a CMOS device is formed on the bottom wafer, a bottom electrode and a moving electrode are formed over the CMOS device, and a cavity is formed between the moving electrode and the bottom electrode.
16. An electronic device, characterized in that it comprises a MEMS device according to one of claims 10 to 15.
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CN108408683B (en) * | 2017-02-09 | 2020-08-18 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
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