CN105551940A - Method of removing photoetching anti-reflective layer containing particle defects - Google Patents
Method of removing photoetching anti-reflective layer containing particle defects Download PDFInfo
- Publication number
- CN105551940A CN105551940A CN201610016127.1A CN201610016127A CN105551940A CN 105551940 A CN105551940 A CN 105551940A CN 201610016127 A CN201610016127 A CN 201610016127A CN 105551940 A CN105551940 A CN 105551940A
- Authority
- CN
- China
- Prior art keywords
- layer
- etch
- seconds
- degrees celsius
- hydrofluoric acid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02096—Cleaning only mechanical cleaning
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
Abstract
The invention discloses a method of removing a photoetching anti-reflective layer containing particle defects, comprising the following steps of: providing a substrate, wherein the substrate comprises a polycrystalline silicon layer and the photoetching anti-reflective layer formed on the polycrystalline silicon layer, and particle defects are formed in the photoetching anti-reflective layer; etching the substrate through a first wet etching technology; and etching the substrate through a second wet etching technology. According to the embodiment of the invention, by means of respectively etching the substrate through a first wet etching technology and a second wet etching technology, the photoetching anti-reflective layer containing particle defects is completely removed, and a clean polycrystalline silicon surface is obtained. In the second wet etching technology, an adhesive force between the particle defects and the polycrystalline silicon layer surface is eliminated through mixed solution of ammonium hydroxide and hydrogen peroxide; and then, aqueous solution of hydrofluoric acid is used for dissolving and removing the particle defects, which effectively avoids that the particle defects are adhered back to the polycrystalline silicon layer surface under relatively strong adhesive force and cannot be removed completely.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to a kind of method removing the photoetching anti-reflecting layer containing grain defect.
Background technology
In semiconductor fabrication process, usually can relate to the link of etch polysilicon.When etching polysilicon, need first to form photoetching anti-reflecting layer at polysilicon surface; Then formed on photoetching anti-reflecting layer and there is certain thickness and the good photoresist layer of uniformity, photoresist layer is exposed, develop, by the design transfer of mask on described photoresist layer, formation photoetching agent pattern; Finally, be that mask etches polysilicon with photoetching agent pattern.Described photoetching anti-reflecting layer can prevent light by reflecting at polysilicon interface place after photoresist layer, thus ensures photoresist layer energy uniform exposure.
But in deposition photoetching anti-reflecting layer process, because some environmental factors are as cavity leakage etc., easily in photoetching anti-reflecting layer, form a large amount of grain defects.The existence of grain defect can cause the polysilicon be positioned in follow-up polycrystalline silicon etching process below particle not to be etched away completely, and this has significant impact by the normal work of semiconductor device and yield.
Summary of the invention
The technical problem that the present invention solves is to provide a kind of method removing the photoetching anti-reflecting layer containing grain defect, improves the yield of semiconductor device.
For solving the problems of the technologies described above, the embodiment of the present invention provides a kind of method removing the photoetching anti-reflecting layer containing grain defect, comprise: substrate is provided, described substrate comprises polysilicon layer and is formed at the photoetching anti-reflecting layer on polysilicon layer, is formed with grain defect in described photoetching anti-reflecting layer; The first wet-etching technology is adopted to etch described substrate; The second wet-etching technology is adopted to etch described substrate.
Alternatively, the method forming described photoetching anti-reflecting layer comprises on the polysilicon layer formation silicon oxynitride layer and silicon dioxide layer successively.
Alternatively, the technique forming described silicon oxynitride layer and silicon dioxide layer comprises plasma enhanced chemical vapor deposition; The thickness range forming described silicon oxynitride layer is 250 dust to 350 dusts, and the thickness range forming described silicon dioxide layer is 40 dust to 60 dusts.
Alternatively, the composition of described grain defect comprises silicon dioxide.
Alternatively, described first wet-etching technology comprises: use the aqueous solution of hydrofluoric acid to etch; And use phosphorus aqueous acid to etch.
Alternatively, in the aqueous solution of described hydrofluoric acid, the volume range of hydrofluoric acid and water is 1:50 to 1:2000, and the temperature range of the aqueous solution of hydrofluoric acid is 22 degrees Celsius to 24 degrees Celsius; Etch period is 50 seconds to 80 seconds.
Alternatively, the concentration range of described phosphorus aqueous acid is the percentage by volume of phosphoric acid is 80% to 90%, and the temperature range of phosphorus aqueous acid is 155 degrees Celsius 165 degrees Celsius; Etch period is 800 seconds to 1200 seconds.
Alternatively, described second wet-etching technology comprises: use the mixed solution of ammoniacal liquor and hydrogen peroxide to etch; And use the aqueous solution of hydrofluoric acid to etch.
Alternatively, the method using the mixed solution of ammoniacal liquor and hydrogen peroxide to carry out etching comprises: adopt the mixed solution of ammoniacal liquor and hydrogen peroxide to soak described polysilicon layer under hyperacoustic effect, described hyperacoustic frequency is 900KHz to 1100KHz, in the mixed solution of described ammoniacal liquor and hydrogen peroxide, the volume ratio of ammonium hydroxide, hydrogen peroxide and water is 1:2:40, and temperature range is 22 degrees Celsius to 24 degrees Celsius; Soak time is 500 seconds to 700 seconds.
Alternatively, in the aqueous solution of described hydrofluoric acid, the volume ratio of hydrofluoric acid and water is 1:100, and temperature is 22 degrees Celsius to 24 degrees Celsius; Etch period is 16 seconds to 24 seconds.
Compared with prior art, the technical scheme of the embodiment of the present invention has following beneficial effect:
The method of the embodiment of the present invention adopts the first wet-etching technology to etch described substrate, to remove photoetching anti-reflecting layer; Adopt the second wet-etching technology to etch further, to remove the grain defect in photoetching anti-reflecting layer, thus remove the photoetching anti-reflecting layer containing grain defect up hill and dale, obtain clean polysilicon surface.
Further, in the method for the embodiment of the present invention, second wet-etching technology eliminates bonding force between grain defect and polysilicon layer surface by using the mixed solution of ammoniacal liquor and hydrogen peroxide, the aqueous dissolution re-using hydrofluoric acid removes described grain defect, efficiently avoid grain defect and cannot thoroughly remove because stronger bonding force after-tacks polysilicon layer surface.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the generalized section that the removal of one embodiment of the invention contains the intermediate structure of the method for the photoetching anti-reflecting layer of grain defect.
Embodiment
The embodiment of the present invention provides a kind of method of photoetching anti-reflecting layer removed containing grain defect, below in conjunction with accompanying drawing in addition detailed description.
Fig. 1 to Fig. 3 is the generalized section that the removal of one embodiment of the invention contains the intermediate structure of the method for the photoetching anti-reflecting layer of grain defect.
With reference to figure 1, provide substrate, described substrate comprises polysilicon layer 100 and is formed at the photoetching anti-reflecting layer 110 on polysilicon layer 100.The method forming described photoetching anti-reflecting layer 110 is included on polysilicon layer 100 and forms silicon oxynitride layer 111 and silicon dioxide layer 112 successively.Grain defect 113 is formed in described photoetching anti-reflecting layer 110.
In one embodiment, the method forming described silicon oxynitride layer 111 is plasma enhanced chemical vapor deposition (PlasmaEnhancedChemicalVaporDeposition, PECVD) technique, technological parameter comprises: reaction temperature is 390 degrees Celsius to 410 degrees Celsius, reacting gas comprises silane and nitrous oxide, the flow of silane be 170 standard milliliters/minute, the flow of nitrous oxide be 390 standard milliliters/minute, sedimentation time is 10 seconds to 13 seconds; The thickness range forming described silicon oxynitride layer is 250 dust to 350 dusts.
The method forming described silicon dioxide layer 112 is plasma enhanced chemical vapor deposition (PECVD) technique, technological parameter comprises: reaction temperature is 390 degrees Celsius to 410 degrees Celsius, reacting gas comprises silane and nitrous oxide, the flow of silane be 20 standard milliliters/minute to 25 standard milliliters/minute, the flow of nitrous oxide be 720 standard milliliters/minute, sedimentation time is 3 seconds to 5 seconds; The thickness range forming described silicon dioxide layer is 40 dust to 60 dusts.
In another embodiment, before described polysilicon layer 100 forms photoetching anti-reflecting layer 110, be also included on polysilicon layer 100 and form other thin layers, as mask layer, oxide layer etc.
In the process that deposition forms described silicon oxynitride layer 111 and silicon dioxide layer 112, due to the existence of some environmental factors, easily cause in photoetching anti-reflecting layer 110, forming a large amount of grain defects 113.In certain embodiments, the composition of described grain defect 113 is silicon dioxide.
It should be noted that, described grain defect 113 is also anisotropically distributed in silicon oxynitride layer 111 and silicon dioxide layer 112, and described grain defect 113 may in irregularly shaped.Shape and the distributing position of the grain defect 113 shown in Fig. 1 are only signal, do not represent described grain defect 113 and necessarily have shape as shown in Figure 1 and position.The grain defect 113 existed in photoetching anti-reflecting layer 110, the polysilicon layer 100 be positioned at below grain defect 113 in follow-up polysilicon layer 100 etching technics can be caused not to be etched away completely, this has significant impact by the normal work of semiconductor device and yield, product yield can be caused too low to such an extent as to product rejection time serious.
In order to improve the utilization ratio of wafer, needing to process wafer, removing the photoetching anti-reflecting layer 110 with grain defect 113, can wafer be reused.
In conjunction with reference to figure 2, the first wet-etching technology is adopted to etch described substrate, to remove described photoetching anti-reflecting layer 110.Described first wet-etching technology comprises: use the aqueous solution of hydrofluoric acid to etch, to remove the silicon dioxide layer 112 in described photoetching anti-reflecting layer 110; And use phosphorus aqueous acid to etch, to remove the silicon oxynitride layer 111 in described photoetching anti-reflecting layer 110.
In the aqueous solution of described hydrofluoric acid, the volume range of hydrofluoric acid and water is 1:50 to 1:2000, and the temperature range of the aqueous solution of described hydrofluoric acid is 22 degrees Celsius to 24 degrees Celsius, and etch period is 50 seconds to 80 seconds; The concentration range of described phosphorus aqueous acid is the percentage by volume of phosphoric acid is 80% to 90%, and the temperature range of described phosphorus aqueous acid is 155 degrees Celsius 165 degrees Celsius, and etch period is 800 seconds to 1200 seconds.
In one embodiment, in the aqueous solution of described hydrofluoric acid, the volume ratio of hydrofluoric acid and water is 1:60, and the temperature of the aqueous solution of described hydrofluoric acid is 23 degrees Celsius, and etch period is 60 seconds; The concentration of described phosphorus aqueous acid is the percentage by volume of phosphoric acid is 86%, and temperature is 160 DEG C, and etch period is 1000 seconds.
In conjunction with reference to figure 3, the second wet-etching technology is adopted to etch further described substrate, to remove described grain defect 113.The step of described second wet-etching technology comprises: use the mixed solution of ammoniacal liquor and hydrogen peroxide to carry out etching and use the aqueous solution of hydrofluoric acid to etch.
It should be noted that, between the surface of grain defect 113 and polysilicon layer 100, there is stronger bonding force, be usually difficult to remove totally.The embodiment of the present invention uses the mixed solution of ammoniacal liquor and hydrogen peroxide with the bonding force between the surface of eliminating grain defect 113 and polysilicon layer 100, conveniently remove described grain defect 113 subsequently through the aqueous dissolution of hydrofluoric acid, prevent grain defect 113 from cannot thoroughly remove because stronger bonding force after-tacks polysilicon layer 110 surface.
The principle of the bonding force that the mixed solution of described ammoniacal liquor and hydrogen peroxide is eliminated between the surface of grain defect 113 and polysilicon layer 100 is, ammonia water electricity is from the OH gone out
-there is faint reaction with the silicon dioxide on grain defect 113 surface and form HSiO
3 -, make grain defect 113 surface band negative electrical charge; There is faint reaction and form the very thin silicon dioxide film of one deck in the Si atom on hydrogen peroxide and polysilicon 100 surface, silicon dioxide film again with ammonia water electricity from the OH gone out
-reaction generates HSiO
3 -, make polysilicon 100 surface band negative electrical charge, such polysilicon 100 surface produces mutual repulsive force with grain defect 113 because being with like charges, thus the bonding force between the surface eliminating grain defect 113 and polysilicon layer 100.
In one embodiment, the method that the mixed solution of described use ammoniacal liquor and hydrogen peroxide carries out etching comprises: adopt the mixed solution of ammoniacal liquor and hydrogen peroxide under hyperacoustic effect, soak described polysilicon layer 100, described hyperacoustic frequency is 900KHz to 1100KHz, in the mixed solution of described ammoniacal liquor and hydrogen peroxide, the volume ratio of ammonium hydroxide, hydrogen peroxide and water is 1:2:40, temperature is 22 degrees Celsius to 24 degrees Celsius, and soak time is 500 seconds to 700 seconds.
After bonding force between the surface eliminating grain defect 113 and polysilicon layer 100, adopt the aqueous solution of hydrofluoric acid to etch described polysilicon layer 100 surface, remove grain defect 113.In one embodiment, in the aqueous solution of described hydrofluoric acid, the volume ratio of hydrofluoric acid and water is 1:100, and temperature is 22 degrees Celsius to 24 degrees Celsius, and etch period is 16 seconds to 24 seconds.
It should be noted that, described first wet-etching technology and the second wet-etching technology for described photoetching anti-reflecting layer 110 and polysilicon layer 100, for having the wet-etching technology of high selectivity.Remove in the process of photoetching anti-reflecting layer 110 and grain defect 113 at employing first wet-etching technology and the second wet-etching technology, the impact caused polysilicon layer 100 is small.
In certain embodiments, after employing first wet-etching technology and the second wet-etching technology eliminate the photoetching anti-reflecting layer 110 of described polysilicon layer 100 surface containing grain defect 113, follow-uply again formed not containing the photoetching anti-reflecting layer of grain defect at normal reaction conditions, greatly can improve the utilance of wafer, whole wafer will be caused to lose efficacy because of the inefficacy of certain road technique.
The method of the embodiment of the present invention, can be applied in semiconductor technology and relate in the photoetching process of polysilicon, if photoetching polysilicon is to be formed in the technique of grid structure.
In one embodiment, in the technique manufacturing nmos fet, when forming grid structure, adopt thermal oxidation technology to form gate oxide at substrate surface, thickness is 50 dusts; Adopt low-pressure chemical vapor deposition process, the gate oxide surface deposition polysilicon on substrate, the thickness of described polysilicon is 5000 dusts, adulterates to polysilicon; Photoetching anti-reflecting layer is formed at polysilicon surface.But, in the process forming photoetching anti-reflecting layer, because reaction cavity is revealed, a large amount of grain defect is produced in photoetching anti-reflecting layer, unaffected in order to ensure the etching technics of follow-up polysilicon, need to remove the photoetching anti-reflecting layer containing grain defect, so adopt described first wet-etching technology and the second wet-etching technology to etch polysilicon surface respectively.After eliminating the photoetching anti-reflecting layer containing grain defect, at normal reaction conditions, again formed not containing the photoetching anti-reflecting layer of grain defect at polysilicon surface, patterned photoresist layer is formed again on photoetching anti-reflecting layer, with described patterned photoresist layer for polysilicon described in mask etching, remove described photoresist layer and photoetching anti-reflecting layer, form grid structure.
In sum, the method for the embodiment of the present invention adopts the first wet-etching technology to etch described substrate, to remove photoetching anti-reflecting layer; Adopt the second wet-etching technology to etch further, to remove the grain defect in photoetching anti-reflecting layer, thus remove the photoetching anti-reflecting layer containing grain defect up hill and dale, obtain clean polysilicon surface.In addition, in the method for the embodiment of the present invention, second wet-etching technology eliminates bonding force between grain defect and polysilicon layer surface by using the mixed solution of ammoniacal liquor and hydrogen peroxide, the aqueous dissolution re-using hydrofluoric acid removes described grain defect, efficiently avoid grain defect and cannot thoroughly remove because stronger bonding force after-tacks polysilicon layer surface.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (10)
1. remove a method for the photoetching anti-reflecting layer containing grain defect, it is characterized in that, comprising:
There is provided substrate, described substrate comprises polysilicon layer and is formed at the photoetching anti-reflecting layer on polysilicon layer, is formed with grain defect in described photoetching anti-reflecting layer;
The first wet-etching technology is adopted to etch described substrate;
The second wet-etching technology is adopted to etch described substrate.
2. the method for claim 1, is characterized in that, the method forming described photoetching anti-reflecting layer comprises on the polysilicon layer formation silicon oxynitride layer and silicon dioxide layer successively.
3. method as claimed in claim 2, it is characterized in that, the technique forming described silicon oxynitride layer and silicon dioxide layer comprises plasma enhanced chemical vapor deposition; The thickness range forming described silicon oxynitride layer is 250 dust to 350 dusts, and the thickness range forming described silicon dioxide layer is 40 dust to 60 dusts.
4. form method as claimed in claim 1, it is characterized in that, the composition of described grain defect comprises silicon dioxide.
5. the method for claim 1, is characterized in that, described first wet-etching technology comprises:
The aqueous solution of hydrofluoric acid is used to etch; And
Phosphorus aqueous acid is used to etch.
6. method as claimed in claim 5, it is characterized in that, in the aqueous solution of described hydrofluoric acid, the volume range of hydrofluoric acid and water is 1:50 to 1:2000, and the temperature range of the aqueous solution of hydrofluoric acid is 22 degrees Celsius to 24 degrees Celsius; Etch period is 50 seconds to 80 seconds.
7. method as claimed in claim 5, is characterized in that, the concentration range of described phosphorus aqueous acid is the percentage by volume of phosphoric acid is 80% to 90%, and the temperature range of phosphorus aqueous acid is 155 degrees Celsius 165 degrees Celsius; Etch period is 800 seconds to 1200 seconds.
8. the method for claim 1, is characterized in that, described second wet-etching technology comprises:
The mixed solution of ammoniacal liquor and hydrogen peroxide is used to etch; And
The aqueous solution of hydrofluoric acid is used to etch.
9. method as claimed in claim 8, it is characterized in that, the method using the mixed solution of ammoniacal liquor and hydrogen peroxide to carry out etching comprises: adopt the mixed solution of ammoniacal liquor and hydrogen peroxide to soak described polysilicon layer under hyperacoustic effect, described hyperacoustic frequency is 900KHz to 1100KHz, in the mixed solution of described ammoniacal liquor and hydrogen peroxide, the volume ratio of ammonium hydroxide, hydrogen peroxide and water is 1:2:40, and temperature range is 22 degrees Celsius to 24 degrees Celsius; Soak time is 500 seconds to 700 seconds.
10. method as claimed in claim 8, it is characterized in that, in the aqueous solution of described hydrofluoric acid, the volume ratio of hydrofluoric acid and water is 1:100, and temperature is 22 degrees Celsius to 24 degrees Celsius; Etch period is 16 seconds to 24 seconds.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610016127.1A CN105551940A (en) | 2016-01-11 | 2016-01-11 | Method of removing photoetching anti-reflective layer containing particle defects |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610016127.1A CN105551940A (en) | 2016-01-11 | 2016-01-11 | Method of removing photoetching anti-reflective layer containing particle defects |
Publications (1)
Publication Number | Publication Date |
---|---|
CN105551940A true CN105551940A (en) | 2016-05-04 |
Family
ID=55831055
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610016127.1A Pending CN105551940A (en) | 2016-01-11 | 2016-01-11 | Method of removing photoetching anti-reflective layer containing particle defects |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105551940A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107342217A (en) * | 2017-07-18 | 2017-11-10 | 成都海威华芯科技有限公司 | A kind of processing method based on secondary wet process etching |
CN110265286A (en) * | 2019-05-21 | 2019-09-20 | 信利半导体有限公司 | A kind of cleaning method of underlay substrate |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050009345A1 (en) * | 2003-07-07 | 2005-01-13 | Yu-Lin Yen | Rework process of patterned photo-resist layer |
CN101465273A (en) * | 2007-12-18 | 2009-06-24 | 中芯国际集成电路制造(上海)有限公司 | Wet-type etching method for reducing wafer surface blemish and device thereof |
CN101656191A (en) * | 2008-08-19 | 2010-02-24 | 中芯国际集成电路制造(上海)有限公司 | Method for removing silicon oxynitride film |
WO2013179569A1 (en) * | 2012-06-01 | 2013-12-05 | 信越半導体株式会社 | Method for cleaning semiconductor wafer |
-
2016
- 2016-01-11 CN CN201610016127.1A patent/CN105551940A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050009345A1 (en) * | 2003-07-07 | 2005-01-13 | Yu-Lin Yen | Rework process of patterned photo-resist layer |
CN101465273A (en) * | 2007-12-18 | 2009-06-24 | 中芯国际集成电路制造(上海)有限公司 | Wet-type etching method for reducing wafer surface blemish and device thereof |
CN101656191A (en) * | 2008-08-19 | 2010-02-24 | 中芯国际集成电路制造(上海)有限公司 | Method for removing silicon oxynitride film |
WO2013179569A1 (en) * | 2012-06-01 | 2013-12-05 | 信越半導体株式会社 | Method for cleaning semiconductor wafer |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107342217A (en) * | 2017-07-18 | 2017-11-10 | 成都海威华芯科技有限公司 | A kind of processing method based on secondary wet process etching |
CN107342217B (en) * | 2017-07-18 | 2019-11-12 | 成都海威华芯科技有限公司 | A kind of processing method based on secondary wet process etching |
CN110265286A (en) * | 2019-05-21 | 2019-09-20 | 信利半导体有限公司 | A kind of cleaning method of underlay substrate |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5278768B2 (en) | Method for making a right angle undercut in single crystal silicon | |
JP2012099550A (en) | Etchant for silicon nitride | |
CN104465369B (en) | The lithographic method of germanium | |
CN102737961B (en) | Method for reducing collapsing or shift of photoresist (PR) mask | |
CN105551940A (en) | Method of removing photoetching anti-reflective layer containing particle defects | |
CN103000520B (en) | The lithographic method of MOS areal gate side wall layer | |
CN103646869B (en) | The cleaning method of wafer | |
CN101252083B (en) | Method for cleaning polycrystalline silicon gate surface | |
CN102243995A (en) | Integration method of gate oxide with different thicknesses in high-voltage process | |
CN105719972A (en) | Formation method of semiconductor structure | |
CN101964307B (en) | The formation method of etched features | |
CN103390539B (en) | The preparation method of thin silicon wafer | |
CN103021817A (en) | Method of cleaning after wet etching | |
CN104252103A (en) | Removal method of residual photoresist after photoetching reworking | |
CN108074803B (en) | Semiconductor structure and forming method thereof | |
CN102709166B (en) | Method for lowering morphological difference of etched N-type doped polycrystalline silicon grid and non-doped polycrystalline silicon grid | |
CN104282549A (en) | Back structure protecting method | |
CN103137463A (en) | Solution for detect of needle shape in deep groove etching process | |
CN101800172A (en) | Manufacturing method of self-aligned polysilicon floating gate | |
CN111825055B (en) | Gold etching method | |
US20130130503A1 (en) | Method for fabricating ultra-fine nanowire | |
KR20160125588A (en) | Semiconductor structure and method for manufacturing the same | |
KR100933809B1 (en) | Dual Gate Oxide Formation Method | |
CN105161414B (en) | The minimizing technology of gate hard mask layer | |
CN106206284B (en) | Improved etching process |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160504 |
|
WD01 | Invention patent application deemed withdrawn after publication |