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CN104617007B - Improve method, motherboard and the mask plate of packaging plastic pattern-sealing property test accuracy - Google Patents

Improve method, motherboard and the mask plate of packaging plastic pattern-sealing property test accuracy Download PDF

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Publication number
CN104617007B
CN104617007B CN201510037382.XA CN201510037382A CN104617007B CN 104617007 B CN104617007 B CN 104617007B CN 201510037382 A CN201510037382 A CN 201510037382A CN 104617007 B CN104617007 B CN 104617007B
Authority
CN
China
Prior art keywords
glue pattern
sealing
motherboard
source
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201510037382.XA
Other languages
Chinese (zh)
Other versions
CN104617007A (en
Inventor
盖人荣
玄明花
嵇凤丽
蒋志亮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Ordos Yuansheng Optoelectronics Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201510037382.XA priority Critical patent/CN104617007B/en
Publication of CN104617007A publication Critical patent/CN104617007A/en
Application granted granted Critical
Publication of CN104617007B publication Critical patent/CN104617007B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

The invention provides a kind of method for improving packaging plastic pattern-sealing property test accuracy, in this method, when making motherboard, form the source and drain lead for being pointed to welding disking area to carry out sealedly sealing glue pattern, the substrate and cover plate of the sealing glue pattern and the motherboard are collectively forming for carrying out sealed annular seal space to source and drain lead;When the cover plate to motherboard to be tested is cut, retain the cover plate of sealing cavity region.So, the test plate (panel) to be measured that method by the present invention is obtained is put into after hot and humid environment, because the source and drain lead of welding disking area is sealed by annular seal space, source and drain lead can be avoided to be corroded, and then avoid the interference tested by the disturbing factor produced by the corrosion that glue pattern is encapsulated caused by the corrosion of source and drain lead pattern-sealing property of packaging plastic, it is possible to increase the accuracy of pattern-sealing property of packaging plastic test.

Description

Improve method, motherboard and the mask plate of packaging plastic pattern-sealing property test accuracy
Technical field
The present invention relates to display technology field, more particularly to a kind of side for improving packaging plastic pattern-sealing property test accuracy Method, motherboard and mask plate.
Background technology
The main component of Frit (glass paste) sizing material is glass dust, and the seamless sealing-in between glass and glass can be achieved And good seal performance, and Frit encapsulation does not need drier, goes for top emitting OLED (organic electroluminescent) display Part, therefore Frit encapsulation is the current method for packing being relatively applicable.
, it is necessary to trust to selected Frit sizing materials and packaging technology during OLED display device is made Property test, with test made under selected sizing material and packaging technology encapsulation glue pattern sealing.It is general, be by Corresponding to being placed in after the cover plate excision of welding disking area in hot and humid environment in made OLED motherboards, pass through pad area afterwards The contraction situation of the sealed pixel of PAD tests encapsulation glue pattern institute in domain.As shown in figure 1, to be put into hot and humid environment The top view of one of panel in the OLED motherboards tested, including base plate glass and cover-plate glass 1 be base plate glass and The laminating of cover-plate glass, and formed in base plate glass and the pixel region A/A of cover-plate glass, for entering to pixel region A/A Row sealedly encapsulates glue pattern 2, the welding disking area outside encapsulation glue pattern 2, and integrated circuit is formed with the welding disking area 3rd, source and drain lead 4, flexible flat cable (Flexible Flat Cable, FPC) 5, PAD 6, wherein in the welding disking area The cover-plate glass of top is removed.When being tested, corresponding signal is applied on the PAD 6 being exposed, to test The contraction situation of pixel in pixel region A/A.
Test mode of the prior art can cause the source and drain lead of welding disking area to be corroded, and the corrosion meeting of source and drain lead Frit packaging plastics are further resulted in be corroded, so that extraneous steam enters pixel region and causes pixel shrinkage, and it is this Situation can't occur when OLED display device is actually used, thus cause the accuracy of the evaluation to Frit glue relatively low.
The content of the invention
It is an object of the invention to provide a kind of method that can improve packaging plastic pattern-sealing property test accuracy, motherboard And mask plate.
The invention provides a kind of method for improving packaging plastic pattern-sealing property test accuracy, the encapsulation glue pattern is used It is packaged in viewing area, including:
When making motherboard to be tested, form the source and drain lead for being pointed to welding disking area and carry out sealed fluid sealant The substrate and cover plate of figure, the sealing glue pattern and the motherboard are collectively forming for sealedly being sealed to source and drain lead Chamber;
When the cover plate to motherboard to be tested is cut, retain the cover plate of sealing cavity region.
Further, the sealing glue pattern is made by ultraviolet cured adhesive material;
After being formed for the sealing glue pattern to source and drain lead-in wire sealing, methods described also includes:Use ultraviolet light pair The sealing glue pattern that ultraviolet cured adhesive material makes is irradiated solidification, and mask plate shielding viewing area is used in irradiation.
Further, the sealing glue pattern is connected with the encapsulation glue pattern.
Further, it is described to be formed for the sealing glue pattern to source and drain lead-in wire sealing, including:
The formation of coating fluid sealant seals glue pattern on the cover board.
Further, the encapsulation glue pattern is formed by glass cement.
Further, the sealing glue pattern is additionally operable to seal flexible flat cable.
Present invention also offers a kind of motherboard, including substrate and cover plate and the use that is formed between the substrate and cover plate In the encapsulation glue pattern for being packaged viewing area, also include being used to be pointed to welding disking area between the substrate and cover plate Source and drain lead carry out sealedly sealing glue pattern, the substrate and cover plate of the sealing glue pattern and the motherboard are collectively forming use In to the sealed annular seal space of source and drain lead progress.
Further, the sealing glue pattern is made by ultraviolet cured adhesive.
Further, the sealing glue pattern is connected with the encapsulation glue pattern.
Further, the encapsulation glue pattern is formed by glass cement.
Further, in addition to:Flexible flat cable, the sealing glue pattern is additionally operable to seal flexible flat cable.
Present invention also offers a kind of mask plate, including the sealing glue pattern in motherboard described in any of the above-described is corresponding Transmission region.
In the method that the present invention is provided, when making motherboard, form the source and drain lead for being pointed to welding disking area and carry out The substrate and cover plate of sealed sealing glue pattern, the sealing glue pattern and the motherboard are collectively forming for entering to source and drain lead The sealed annular seal space of row;When the cover plate to motherboard to be tested is cut, retain the cover plate of sealing cavity region.So, will The test plate (panel) to be measured obtained by the method for the present invention is put into after hot and humid environment, because the source and drain lead of welding disking area is close Chamber sealing is sealed, source and drain lead can be avoided to be corroded, and then avoids the encapsulation glue pattern caused by the corrosion of source and drain lead The interference that disturbing factor produced by corrosion is tested pattern-sealing property of packaging plastic, it is possible to increase pattern-sealing property of packaging plastic is tested Accuracy.
Brief description of the drawings
Fig. 1 is in the prior art for the structural representation for the test plate (panel) to be measured for testing pattern-sealing property of packaging plastic;
A kind of stream of the method for raising packaging plastic pattern-sealing property test accuracy that Fig. 2 provides for one embodiment of the invention Journey schematic diagram;
The structural representation for being used to test the test plate (panel) to be measured of pattern-sealing property of packaging plastic that Fig. 3 provides for one embodiment of the invention Figure;
Fig. 4 is the schematic diagram of sealing glue pattern in Fig. 3;
The structural representation for the mask plate that Fig. 5 provides for the present invention.
Embodiment
With reference to the accompanying drawings and examples, the embodiment to the present invention is described in further detail.Implement below Example is used to illustrate the present invention, but is not limited to the scope of the present invention.
As shown in figure 1, a kind of raising packaging plastic the pattern-sealing property test accuracy provided for one embodiment of the invention Method, encapsulation glue pattern here is used to be packaged viewing area, and this method includes:
Step 201, when making motherboard to be tested, formed and sealed for being pointed to the source and drain lead of welding disking area Sealing glue pattern, the substrate and cover plate of the sealing glue pattern and the motherboard are collectively forming close for being carried out to source and drain lead The annular seal space of envelope;
Step 202, when the cover plate to motherboard to be tested is cut, the cover plate of sealing cavity region is retained.
The test plate (panel) to be measured that method by the present invention is obtained is put into after hot and humid environment, due to the source of welding disking area Leakage lead is sealed by annular seal space, and source and drain lead can be avoided to be corroded, and then avoids the envelope caused by the corrosion of source and drain lead The interference that disturbing factor produced by filling the corrosion of glue pattern is tested pattern-sealing property of packaging plastic, it is possible to increase encapsulation glue pattern The accuracy of performing leak test.
In above-mentioned step 201, the process for making motherboard to be tested may be referred to prior art, with prior art not With before cover plate is covered on substrate, being formed is used to carry out source and drain lead sealedly sealing glue pattern.So exist After cover plate is covered on substrate, sealing glue pattern is formed together with cover plate carries out sealed annular seal space to source and drain lead.
In the specific implementation, the concrete shape of the sealing glue pattern 4 formed may be referred to Fig. 3, the figure of the fluid sealant Shape is annular, is centered around the periphery of source and drain lead 4.In addition, in order to further improve sealing effectiveness, fluid sealant figure can also be set Shape 7 is looped around integrated circuit 3 and FPC5 outside.In this way, the source and drain caused by FPC or IC corrosion can be avoided The corrosion of lead 4.
In the specific implementation, in above-mentioned step 101, sealing glue pattern 7 can be made using ultra-violet curing glue material. Now, after being formed for the sealing glue pattern to source and drain lead-in wire sealing, above-mentioned step 101 also includes:Use ultraviolet light Solidification is irradiated to the sealing glue pattern that ultraviolet cured adhesive material makes, mask plate shielding viewing area is used in irradiation Domain.In this way, sealing glue pattern can be made to be molded well, advantageously reduces the difficulty for making sealing glue pattern.When So in actual applications, it would however also be possible to employ other materials makes above-mentioned sealing glue pattern.Resin can also be such as initially formed Layer, forms above-mentioned sealing glue pattern by the way of photoetching afterwards.As long as the sealing to source and drain lead can be realized, using what Plant material or technique makes above-mentioned sealing glue pattern and has no effect on protection scope of the present invention.
Further, in order to avoid when being irradiated solidification, ultraviolet causes to damage to the pixel of pixel region, can be with Mask plate shielding viewing area is used when being irradiated.
In actual applications, can be on cover plate (being usually cover-plate glass) fluid sealant graphic application.It will be formed afterwards close The cover plate of sealing figure is covered to be sealed on the substrate of motherboard to the formation of source and drain lead.Further, in order to improve sealing effectiveness, When the painting of cover plate for sealing glue pattern is covered with, above-mentioned ultraviolet curing glue can be used, is just consolidated after cover-plate glass is covered Change.
In the specific implementation, in order to improve sealing effectiveness, the fluid sealant figure being connected with the encapsulation glue pattern 2 can be formed Shape 7.In this way, the source and drain lead outside packaging plastic graphics field can be fully sealed, improves sealing effectiveness, Further improve the accuracy of test.
In the specific implementation, encapsulation glue pattern here can be formed by glass cement.
As shown in figure 4, sealing glue pattern 7 here can include being used to carry out sealed part 71 and position to source and drain lead In the part 72 of whole motherboard fringe region.Now, if sealing glue pattern here is made by uv-curable glue, close to this When sealing figure is irradiated, the mask plate used may be referred to Fig. 5.The mask plate is corresponding with 72 position corresponding to 71 Transmission region 71 ' and 72 ' is formed with, for solidifying to sealing glue pattern.
Based on identical design, present invention also offers a kind of motherboard, the motherboard can be close as test sealant figure The motherboard of envelope property, with reference also to Fig. 3, including:Base plate glass and cover-plate glass 1, and formed in base plate glass and cover-plate glass Pixel region A/A, for pixel region A/A carry out sealedly encapsulation glue pattern 2, encapsulation glue pattern 2 outside pad Region, integrated circuit 3, source and drain lead 4, FPC5, PAD6, sealing glue pattern 7 are formed with the welding disking area.Cut When, the region sealed in welding disking area outside glue pattern 7 can be cut away, PAD is only exposed.So due to welding disking area Source and drain lead sealed by annular seal space, source and drain lead can be avoided to be corroded, and then from avoiding because the corrosion of source and drain lead causes Encapsulation glue pattern corrosion produced by the interference tested pattern-sealing property of packaging plastic of disturbing factor, it is possible to increase packaging plastic The accuracy of pattern-sealing property test.
In the specific implementation, the concrete shape of the sealing glue pattern 4 formed may be referred to Fig. 3, the figure of the fluid sealant Shape is annular, is centered around the periphery of source and drain lead 4.In addition, in order to further improve sealing effectiveness, fluid sealant figure can also be set Shape 7 is looped around integrated circuit 3 and FPC5 outside, for sealing integrated circuit 3 and FPC5.In this way, it can avoid The corrosion of source and drain lead 4 caused by FPC or IC corrosion.
In the specific implementation, sealing glue pattern 7 can be made by ultraviolet cured adhesive.
Further, the sealing glue pattern 7 is connected with the encapsulation glue pattern 2.
Further, the encapsulation glue pattern is formed by glass cement.
Panel in the present invention can be oled panel etc..
Present invention also offers a kind of mask plate, as shown in figure 5, being formed with the mask plate suitable for the sealing in Fig. 4 The part of glue pattern 71 is exposed the transparent region 71 ' of solidification, and the part of sealing glue pattern 72 in Fig. 4 is exposed solidification Transparent region 72 '.
Description of the invention is provided for the sake of example and description, and is not exhaustively or by the present invention It is limited to disclosed form.Many modifications and variations are obvious for the ordinary skill in the art.Select and retouch State embodiment and be more preferably to illustrate the principle and practical application of the present invention, and one of ordinary skill in the art is managed The solution present invention is so as to design the various embodiments with various modifications suitable for special-purpose.

Claims (10)

1. a kind of method for improving packaging plastic pattern-sealing property test accuracy, the encapsulation glue pattern is used to enter viewing area Row encapsulation, it is characterised in that including:
When making motherboard to be tested, source and drain lead, integrated circuit and the flexible flat for being pointed to welding disking area are formed Cable carries out sealedly sealing glue pattern, and the substrate and cover plate of the sealing glue pattern and the motherboard are collectively forming for source Leakage lead, integrated circuit and flexible flat cable carry out sealed annular seal space;
When the cover plate to motherboard to be tested is cut, retain the cover plate of sealing cavity region.
2. the method as described in claim 1, it is characterised in that the sealing glue pattern is made by ultraviolet cured adhesive material;
After being formed for the sealing glue pattern to source and drain lead-in wire sealing, methods described also includes:Using ultraviolet light to ultraviolet The sealing glue pattern that optic-solidified adhesive material makes is irradiated solidification, and mask plate shielding viewing area is used in irradiation.
3. the method as described in claim 1, it is characterised in that the sealing glue pattern is connected with the encapsulation glue pattern.
4. the method as described in claim 1, it is characterised in that the formation is used for the fluid sealant figure to source and drain lead-in wire sealing Shape, including:
The formation of coating fluid sealant seals glue pattern on the cover board.
5. the method as described in claim 1, it is characterised in that the encapsulation glue pattern is formed by glass cement.
6. a kind of motherboard, including substrate and cover plate and formation being used between the substrate and cover plate are carried out to viewing area The encapsulation glue pattern of encapsulation, it is characterised in that also include the source for being used to be pointed to welding disking area between the substrate and cover plate Leakage lead, integrated circuit and flexible flat cable carry out sealedly sealing glue pattern, the sealing glue pattern and the motherboard Substrate and cover plate are collectively forming for carrying out sealed annular seal space to source and drain lead, integrated circuit and flexible flat cable.
7. motherboard as claimed in claim 6, it is characterised in that the sealing glue pattern is made by ultraviolet cured adhesive.
8. motherboard as claimed in claim 6, it is characterised in that the sealing glue pattern is connected with the encapsulation glue pattern.
9. motherboard as claimed in claim 6, it is characterised in that the encapsulation glue pattern is formed by glass cement.
10. a kind of mask plate, including the corresponding transparent area of sealing glue pattern in motherboard as described in claim any one of 6-9 Domain.
CN201510037382.XA 2015-01-23 2015-01-23 Improve method, motherboard and the mask plate of packaging plastic pattern-sealing property test accuracy Expired - Fee Related CN104617007B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510037382.XA CN104617007B (en) 2015-01-23 2015-01-23 Improve method, motherboard and the mask plate of packaging plastic pattern-sealing property test accuracy

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Application Number Priority Date Filing Date Title
CN201510037382.XA CN104617007B (en) 2015-01-23 2015-01-23 Improve method, motherboard and the mask plate of packaging plastic pattern-sealing property test accuracy

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CN104617007B true CN104617007B (en) 2017-08-01

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106773213B (en) * 2017-01-03 2020-02-18 京东方科技集团股份有限公司 Display panel, preparation method thereof and display device

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Publication number Priority date Publication date Assignee Title
TW393819B (en) * 1997-12-17 2000-06-11 Nippon Electric Co Organic thin film EL device and method for making the same
CN101162314A (en) * 2007-08-16 2008-04-16 昆山维信诺显示技术有限公司 Display device and method for manufacturing mask plate and display device
CN101221973A (en) * 2006-11-10 2008-07-16 三星Sdi株式会社 Organic light emitting display device and method for fabricating the same
CN101442042A (en) * 2008-08-07 2009-05-27 昆山维信诺显示技术有限公司 Display device, preparation method and mask board for preparing the same
CN101459086A (en) * 2008-08-20 2009-06-17 昆山维信诺显示技术有限公司 Encapsulation method and encapsulation construction for organic light emitting display device

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Publication number Priority date Publication date Assignee Title
KR100635514B1 (en) * 2006-01-23 2006-10-18 삼성에스디아이 주식회사 Organic electroluminescence display device and method for fabricating of the same
CN202352734U (en) * 2011-12-15 2012-07-25 京东方科技集团股份有限公司 Organic light emitting diode (OLED) display
CN104090388A (en) * 2014-06-25 2014-10-08 京东方科技集团股份有限公司 Array substrate and display device comprising same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW393819B (en) * 1997-12-17 2000-06-11 Nippon Electric Co Organic thin film EL device and method for making the same
CN101221973A (en) * 2006-11-10 2008-07-16 三星Sdi株式会社 Organic light emitting display device and method for fabricating the same
CN101162314A (en) * 2007-08-16 2008-04-16 昆山维信诺显示技术有限公司 Display device and method for manufacturing mask plate and display device
CN101442042A (en) * 2008-08-07 2009-05-27 昆山维信诺显示技术有限公司 Display device, preparation method and mask board for preparing the same
CN101459086A (en) * 2008-08-20 2009-06-17 昆山维信诺显示技术有限公司 Encapsulation method and encapsulation construction for organic light emitting display device

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