AU2006243066B2

AU2006243066B2 - Circuit protection device and test facility to simulate a fault condition

Info

Publication number: AU2006243066B2
Application number: AU2006243066A
Authority: AU
Inventors: Jonathan Keith Jackson; Brian M. Reeder
Original assignee: Eaton Industries Manufacturing GmbH
Current assignee: Eaton Industries Manufacturing GmbH
Priority date: 2005-05-04
Filing date: 2006-05-03
Publication date: 2011-05-12
Anticipated expiration: 2026-05-03
Also published as: EP1883828A1; ZA200710553B; WO2006117550A1; AU2006243066A1; GB0509045D0

Description

WO 2006/117550 PCT/GB2006/001606 1 CIRCUIT PROTECTION DEVICE AND TEST FACILITY TO SIMULATE A FAULT CONDITION This invention relates to a circuit protection 5 device. In particular, this invention relates to a circuit protection device, such as a residual current device, which includes a test facility to simulate a fault condition to ensure reliable operation of the device. 10 Circuit protection devices, such as residual current devices (RCDs), are routinely used to monitor and protect against electrocution and fire risks on electrical installations. Typical operation of a conventional RCD 15 is shown in Fig. 1, which depicts an electrical load (i.e. electrical appliance, socket or circuit) connected to an electrical supply, via the RCD 10. The RCD 10 consists of a toroid 12 having supply phase and neutral conductors passing therethrough, which act as the primary 20 winding of a current transformer; a secondary winding 14 around the toroid is connected to a trip mechanism 20 via some form of detection electronics 16 and solenoid 18. Under normal conditions, the phase and neutral currents are equal and opposite, and no flux is induced in the 25 toroid 12, and hence no current flows in the secondary winding 14. If a fault condition occurs, and current flows through the earth path back to the electrical supply, the phase and neutral currents will no longer be balanced and flux will be induced in the toroid 12, and a 30 current will flow in the secondary winding 14. If the current flowing in, the secondary winding 14 exceeds a WO 2006/117550 PCT/GB2006/001606 2 predetermined fault condition, the detection electronids 16 will activate the trip mechanism 20 opening contacts 22 in the supply conductors and thereby disconnecting the electrical supply. 5 As most RCDs are electromechanical devices, they should be periodically tested, usually via a test button 24 on the front of the device, to ensure reliable operation. As shown in Fig. 1, the RCD 10 generates a 10 test current which simulates a fault current when the test button 24 is operated. This is done by connecting a resistance Rt across the supply conductors when the test button 24 is pressed. This current is passed through the toroidal sensor 12 and a fault current is induced in the 15 secondary winding 14, which activates the trip mechanism 20 opening contacts 22 in the supply conductors There are a number of drawbacks of using this existing method to test the operation of RCDs. Firstly, 20 the test current is dependent on the line voltage. To avoid variations in supply causing the test not to function, it is common to use a current which appears as much as 2.5 times that which should be required to trip the RCD. Clearly this is not an effective test of the 25 device response. Secondly, the test current is set by resistor Rt to match the trip threshold of the RCD and this means that each RCD rating requires a different test resistance to be connected. This makes production organisation more difficult. Another problem is that 30 current required to trip the test device can be large, (commonly lA in a 500 mA rated RCD with a single test winding) and this requires test resistances which have to 3 withstand high voltages and power dissipation. Another problem is that the test button 24, and associated conductors, are connected to mains voltages, which can of course cause mechanical difficulties in routing live conductors. 5 Some of these limitations have been overcome by using an RCD having an independent test current generator, as shown in Fig. 2. The method of operation of this RCD 10 works in a similar manner as described above, although the test current is generated by a microprocessor-controlled test signal generator 26 for injecting into the current transformer. However, an additional test winding 28 is used to inject the test signal into the toroid 12, which is then detected by the secondary winding 14. 10 This system has advantages in that the test current is no longer dependent on supply voltage and does not require a different high voltage and high power test resistor for each device rating, the required test current can be programmed as required. It does however have the disadvantage of requiring an additional test winding 28. Given that the test signal generator 26 can generally only generate low currents, of the order of a few milliamps, then the test coil 28 has to have many turns in order to 15 generate a representative equivalent imbalanced current signal in the sense winding 14. The present invention to provides a circuit protection device which includes a test facility to simulate a fault condition to ensure reliable operation of the device. Said device and method enabling the operation of a circuit protection device to be quickly and accurately evaluated. The present 20 invention to provides a circuit protection device whereby the test signal is mains voltage independent and all device ratings can be verified without the need for high power resistors. The present invention also not requiring an additional test coil, thus simplifying manufacture, and so reducing costs. In a further object of the present invention, the test signal generating means is capable of generating signal waveforms of any shape, frequency and amplitude using a set of instructions or algorithm written in 25 software in a processing means. The predetermined fault condition or trip threshold of the device can also be set within the processing means by means of software. In the present invention, the test button has only to interface to a low voltage input on the processing means. Further, in use, the amplitude of the test signal is independent of mains voltage and is completely under the control of the processing means. 30 According to the present invention there is provided a circuit protection device for detecting a current imbalance in an electrical supply, comprising: a current transformer for generating a sense current in a sense coil in response to said current imbalance in said electrical supply; 35 processing means, connected to the output of said sense coil, said processing means processing whether said sense current exceeds a predetermined fault condition; 4 relay means, being operative from said processing means, said relay means disconnecting said electrical WO 2006/117550 PCT/GB2006/001606 5 supply if said sense current exceeds said predetermined fault condition; and test signal generating means, being connected to the input of said sense coil, said test signal generating 5 means injecting at least one test signal representative of said current imbalance into said sense coil. Also according to the present invention there is provided a method of testing the operation of a circuit 10 protection device connecting an electrical installation to an electrical supply, said circuit protection device comprising a current transformer for generating a sense current in a sense coil in response to a current imbalance in said electrical supply, and tripping 15 mechanism responsive to the output of said current transformer for controlling the operation of said circuit protection device, the method comprising the steps of: injecting at least one test signal representative of said current imbalance directly into said sense coil of 20 said current transformer; receiving a sense current from the output of said current transformer and comparing the magnitude of such in relation to a predetermined fault condition; and tripping said circuit protection device if said 25 sense current exceeds said predetermined fault condition. Preferably, said circuit protection device is a residual current device. In use, said relay means further comprises a trip coil controlling main contacts 30 in the phase and neutral of said electrical supply. Said relay means further comprising overload and earth fault elements.

WO 2006/117550 PCT/GB2006/001606 6 Further preferably, said circuit protection device is a digital residual current device. Said processing means may be provided as a microprocessor or digital 5 signal processor. In use, said microprocessor or digital signal processor includes a set of instructions or algorithm written in software. Preferably, said predetermined fault condition is stored in said set of instructions or algorithm written in software in said 10 processing means. When testing the operation of said circuit protection device, the set of instructions or algorithm written in software in said processing means outputs at 15 least one digital test signal which is converted to an analogue signal using at least one digital-to-analogue converter. Said analogue signal controls a buffer or current source which produces said at least one test signal of defined shape, frequency and amplitude for 20 input to the sense coil. A signal amplifier and analogue-to-digital converter then measures said sense current flowing through the sense coil. The output of the analogue-to-digital converter being a digital signal representative of the current flowing in the sense coil 25 which is then processed in said processing means and compared with said predetermined fault condition. In use, said buffer or current source may be implemented using a first operational amplifier. Said 30 signal amplifier may be provided using a second operational amplifier configured as trans-resistance amplifier. Further preferably, the digital signal WO 2006/117550 PCT/GB2006/001606 7 representative of the current flowing in the sense coil is processed to calculate an RMS sense current level, which is then input to the processing means. 5 Preferably, said at least one test signal representative of said current imbalance is not more than two times the rated residual current. In use, test signals of any defined shape, frequency and amplitude are injected into the sense coil. Preferably, said at least 10 one test signal is a DC pulse. It is believed that a circuit protection device in accordance with the present invention at least addresses the problems outlined above. The advantages of the 15 present invention are that a device and method are provided to enable the operation of a circuit protection device to be quickly and accurately evaluated. Advantageously, the at least one test signal is mains voltage independent and all device ratings can be 20 verified without the need for high power resistors. The present invention also has the advantage of not requiring an additional test coil, thus simplifying manufacture, and so reducing costs. Advantageously, the test signal generating means is capable of generating signal 25 waveforms of any shape, frequency and amplitude using a set of instructions or algorithm written in software in the processing means. The predetermined fault condition or trip threshold of the device can also be set within the processing means by means of software. Further 30 advantageously, the test button has only to interface to a low voltage input on the processing means. Further WO 2006/117550 PCT/GB2006/001606 8 advantageously, the amplitude of the test signal is completely under the control of the processing means. A specific non-limiting embodiment of the invention 5 will now be described by way of example and with reference to the accompanying drawings, in which: Fig. 1 shows schematically the operation of a known electromechanical RCD which includes a test facility to 10 simulate a fault condition; Fig. 2 illustrates an alternative prior art technique for use with digital RCDs which includes a separate microprocessor-controlled current generator for 15 injecting a test current into a separate test coil wound on the toroid; Fig. 3 shows schematically how the present invention is implemented in a digital RCD; 20 Fig. 4 illustrates schematically further detail of how a test signal representative of a fault condition is generated and compared according to the present invention; 25 Fig. 5 is a circuit diagram which illustrates how a test signal representative of a fault condition can be generated in one example of the present invention; and 30 Fig. 6 is a circuit diagram which illustrates alternative techniques for generating test signals according to the present invention.

WO 2006/117550 PCT/GB2006/001606 9 Referring now to the drawings, a circuit protection device according to the present invention is shown schematically in Fig. 3. The circuit protection device 5 of the present invention is realised as a digital RCD 30, implemented using a processing means 36 such as microprocessor or digital signal processor. In use, the digital RCD 30 protects an electrical installation or load, which is connected to an electrical supply. As 10 shown in Fig. 3, the phase and neutral cables from the supply to the load are passed through a toroid 32. On the toroid 32 is wound a sense coil 34; the toroid 32 and sense coil 34 arrangement being referred to as a current transformer, i.e. under normal conditions, the phase and 15 neutral currents are equal and opposite, and no flux is induced in the toroid 32, and hence no current flows in the sense coil 34. If a fault condition occurs, and current flows through the earth path back to the electrical supply, the phase and neutral currents will no 20 longer be balanced and flux will be induced in the toroid 32, and a sense current will flow in the sense coil 34. The output of the sense coil 34 is taken to processing means 36. Although not shown in Fig. 3, the 25 analogue signal from the output of the sense coil 34 is first converted to digital form by any suitable type of analogue-to-digital converter (ADC) available in the art. In operation, a set of instructions or algorithm written in software in the processing means 36 contuinally 30 compares the sense current from the sense coil 34 with a predetermined fault condition or trip threshold. In the event that that the sense current exceeds the WO 2006/117550 PCT/GB2006/001606 10 predetermined fault condition, the processing means 36 activates a relay 38 to open the trip mechanism 40 opening contacts 42 in the supply conductors. 5 The RCD 30 also includes a test signal generating means 44 to simulate a fault condition to ensure reliable operation of the device. The test signal generating means 44 is under the control of the processing means 36 and is capable of generating test current signal 10 waveforms of any shape, frequency and amplitude using any suitable type of digital-to-analogue converter (DAC) (not shown) available in the art. The output of the test signal generating means 44 is fed to the sense coil 34 wound on toroid 32. A test button 46 is included to 15 simulate a fault condition, although, in use, it is understood that such button 46 is provided by any suitable electronic switch under the control of the processing means 36. In a test condition, the test signal generated by the test signal generating means 44 20 is effectively added to any existing fault or imbalance current in the sense coil 34, and, after being first converted to digital form, it is this signal that is compared to the predetermined fault or threshold condition in the processing means 36. In this way, it is 25 clear that the continuity of the sense coil 34 on the toroidal core 32 is tested by such means. If continuity is lost, then the device will not trip when the test button 46 is pressed. 30 Fig. 4 illustrates in further detail how the test signal representative of a fault condition is generated and compared under the control of appropriate digital WO 2006/117550 PCT/GB2006/001606 11 signals from the processing means 36. Conceptionally, the blocks to the left of the processing means 36 shown in Fig 4. are -representative of the test signal generating means 44 shown in Fig. 3, and show further 5 detail of how the test signals are generated in the sense coil 34 and then compared to the predetermined fault or threshold condition in processing means 36. When test button 46 is closed to test the operation 10 of a circuit protection device, the set of instructions or algorithm written in software in processing means 36 produces an appropriate digital signal which is converted to analogue form using DAC 48. The analogue output of DAC 48 controls a buffer or current source 50 which 15 produces test signal waveforms of defined shape, frequency and amplitude for input to the sense coil 34. An amplifier 52 and ADC 54 then measure the current flowing through the sense coil 34. The output of ADC 54 is then a digital signal representative of the current 20 flowing in the sense coil 34 which is then processed in the processing means 36 and compared with a predetermined trip threshold or fault condition, which is also set within the processing means 36 by means of software. If the sensed current exceeds a predetermined fault 25 condition, then the processing means 36 activates the trip mechanism 40, as described above in respect of Fig. 3. In normal mode of operation, when acting as a 30 circuit protection device, the set of instructions or algorithm written in software in the processing means 36 contuinally compares the sense current from the sense WO 2006/117550 PCT/GB2006/001606 12 coil 34 with this predetermined fault or threshold condition. To initiate a test procedure as described above, the user can simply depress the test button 46 and it is also envisaged that the software in the processing 5 means 36 routinely injects a test signal representative of a fault condition in the sense coil 34 as a background test. Clearly, if the operation of the device is verified during such a background test, the processing means 36 will not activate the trip mechanism 40 and the 10 electrical supply will not be disconnected. Fig. 5 shows one approach using operational amplifiers in conjunction with appropriate digital signals to generate suitable test signals for a variety 15 of sense coils 34. The circuit shown in Fig. 4 depicts one example of a test signal generating means 44 shown in Fig. 3 under the control of appropriate digital signals from the processing means 36. In this circuit, a test signal voltage is generated at the DAC 48 and a first 20 operational amplifier UlB uses feedback to convert this to a current source. This current is injected into the sense coil 34. The magnitude of the current can be controlled by setting an appropriate voltage and careful selection of the current sense resistor R 2 , which is 25 typically 500. This gives a defined measurable test current which can be measured by a second operational amplifier UlA which is configured as a trans-resistance amplifier 52 and ADC 54. The trans-resistance of the amplifier 52 having a trans-resistance defined by the 30 value of resistor R 1 . The output of the ADC 54 is then processed to calculate the RMS sense current level, which is then input to the processing means 36.

WO 2006/117550 PCT/GB2006/001606 13 This technique would be able to detect all faults except for those relating to the toroid core's magnetic properties. The circuit would not be affected by any 5 existing leakage currents, so the test signal need not be more than two times the rated residual current. However, disconnecting the normal analogue ground and connecting the current source during a test procedure would also require separate analogue switches (not shown) to be 10 connected in the test path. In this regard, the circuit of Fig. 6 depicts a test signal generation stage and amplification stage with three possible test signal options. For the purposes of 15 this description, these are labelled DAC O/P1, DAC O/P2 and DAC O/P3. Under normal operation, all three outputs would be set to high impedance and only driven as outputs for the purposes of a test. In use, only one of the test signal generation methods would be employed at any one 20 time. All signals DAC O/Pl, DAC O/P2 and DAC O/P3 may be generated using any form of digital-to-analogue conversion method. Test signal generation by output DAC O/Pl provides 25 an additional current injected into the test path, i.e. the toroid and sense coil 34. The magnitude of the current can be controlled by careful selection of a limiting resistor (not shown) and setting the DAC 48 voltage. This would give a defined measurable test 30 current, which is also measured by the microcontroller's converter 54. Test signal DAC O/Pl provides for detection of measurement system faults, but not sense coil 34 WO 2006/117550 PCT/GB2006/001606 14 winding or magnetic faults. The test signal is'added to any standing fault currents and so its magnitude, frequency. and phase have to be taken into account. 5 Test signal generation by output DAC O/P2 changes the operational amplifier's UlA 'virtual earth' potential and so forces a current to flow through the sense coil 34. Because of the nature of the shifting 'virtual earth', the dynamic range of the test signal is reduced 10 by a factor of two, but it can be easily driven by a high impedance DAC 48 output. Again, the test current generated would be measured by the measurement system of the second operational amplifier UlA which is configured as a trans-resistance amplifier 52 and ADC 54. If the 15 sense coil 34 is disconnected the amplifier would still 'see' the test signal. Test signal generation by output DAC O/P3 changes the toroid analogue ground potential and so forces a 20 current to flow through the toroid. In this case the full signal dynamic range is available, but it requires a buffer amplifier UlB to provide a low impedance voltage source. The generated current is then measured in exactly the same way as above in respect of DAC O/P2, 25 however, if the coil is disconnected the measurement system would not 'see' the test signal. For both options DAC O/P2 and DAC O/P3, the test voltage of a given magnitude would generate a test 30 current in the toroid dependent on the toroid inductance Li. This would make it very difficult to accurately define the test current, without some form of calibration WO 2006/117550 PCT/GB2006/001606 15 with a specific toroid 34 connected. This test signal is added to any existing residual current so its magnitude, frequency and phase have also to be taken into account. 5 Conversely, it would be possible to verify the coil continuity and magnetic properties by measuring the actual test current produced by the test voltage. In this case, the test signal would ideally be a DC pulse, which should cause the toroid current to increase 10 linearly. This increasing toroid current could be measured by the trans-resistance amplifier and compared to its expected performance. Any discrepancy would indicate a fault. 15 Various alterations and modifications may be made to the present invention without departing from the scope of the invention. For example, although particular embodiments refer to implementing the present invention on a single-phase electrical installation, this is no way 20 intended to be limiting as, in use, the present invention could be incorporated into larger installations, both single and multi-phase.

Claims

1. A circuit protection device for detecting a current imbalance in an electrical supply, comprising: 5 a current transformer for generating a sense current in a sense coil in response to said current imbalance in said electrical supply; processing means, connected to the output of said sense coil, said processing means processing whether said sense current exceeds a predetermined fault condition; relay means, being operative from said processing means, said relay means 10 disconnecting said electrical supply if said sense current exceeds said predetermined fault condition; and test signal generating means, being connected to the input of said sense coil, said test signal generating means injecting at least one test signal representative of said current imbalance into said sense coil. 15

2. The circuit protection device according to claim I, wherein said circuit protection device is a residual current device.

3. The circuit protection device according to claims 1 or 2, wherein said relay means 20 further comprises a trip coil controlling main contacts in the phase and neutral of said electrical supply.

4. The circuit protection device according to any of claims 1 to 3, wherein said relay means further comprises overload and earth fault elements. 25

5. The circuit protection device according to any preceding claim, wherein said circuit protection device is digital residual current device.

6. The circuit protection device according to any preceding claim, wherein said 30 processing means is a microprocessor or digital signal processor.

7. The circuit protection device according to claim 1, wherein said predetermined fault condition is stored in a set of instructions or algorithm written in software in said processing means. 35

8. The circuit protection device according to claim 1, wherein said test signal generating means is controlled by said processing means and, under a test condition, a set of 17 instructions or algorithm written in software in said processing means outputs at least one digital test signal which is converted to an analogue signal using at least one digital-to analogue converter. 5

9. The circuit protection device according to claim 8, wherein said analogue signal controls a buffer or current source which generates said at least one test signal representative of said current imbalance having a defined shape, frequency and amplitude for input to said sense coil.

10 10. The circuit protection device according to claim 1, further comprising a signal amplifier and analogue-to- digital converter connected between the output of said sense coil and the input of said processing means.

11. The circuit protection device according to claim 10, wherein the output of said 15 analogue-to-digital converter is then processed in said processing means to provide a digital signal representative of the current flowing in said sense coil and which is compared with said predetermined fault condition.

12. The circuit protection device according to claim 9, wherein said buffer or current 20 source is implemented using a first operational amplifier.

13. The circuit protection device according to claim 10, wherein said signal amplifier is implemented using a second operational amplifier configured as a trans-resistance amplifier. 25

14. The circuit protection device according to claim 11, wherein digital signal representative of the current flowing in said sense coil is processed to calculate an RMS sense current level which is then inputted to said processing means.

15. The circuit protection device according to claim 1, wherein said at least one test 30 signal representative of said current imbalance is not more than two times the rated residual current.

16. The circuit protection device according to claim 1, wherein said at least one test signal representative of said current imbalance is a DC pulse. 35

17. The circuit protection device according to claim 1, further comprising a test button which is connected to the input of said processing means.

18 1 8. The circuit protection device according to claim 17, wherein said test button is provided by any suitable electronic switch under the control of said processing means. 5

19. The circuit protection device according to claim 1, wherein a set of instructions or algorithm written in software in said processing means routinely simulates a fault condition as a background test.

20. The circuit protection device according to claim 19, wherein said processing means 10 does not activate said relay means and said electrical supply will not be disconnected, if the operation of said device is verified during said background test.

21. A method of testing the operation of a circuit protection device connecting an electrical installation to an electrical supply, said circuit protection device comprising a 1 5 current transformer for generating a sense current in a sense coil in response to a current imbalance in said electrical supply, and tripping mechanism responsive to the output of said current transformer for controlling the operation of said circuit protection device, the method comprising the steps of: injecting at least one test signal representative of said current imbalance directly into 20 said sense coil of said current transformer; receiving a sense current from the output of said current transformer and comparing the magnitude of such in relation to a predetermined fault condition; and tripping said circuit protection device if said sense current exceeds said predetermined fault condition. 25

22. The method according to claim 21, wherein said circuit protection device is a digital residual current device.

23. The method according to claims 21 or 22, wherein said processing means is a 30 microprocessor or digital signal processor including a set of instructions or algorithm written in software.

24. The method according to claim 21, wherein the step of injecting at least one test signal representative of said current imbalance directly into said sense coil of said current 35 transformer, further comprises the steps of: outputting at least one digital test- signal; and IV converting said at least one digital test signal to an analogue signal, said analogue signal generating said at least one test signal representative of said current imbalance having a defined shape, frequency and amplitude. 5

25. The method according to claim 21, wherein the step of receiving a sense current from the output of said current transformer and comparing the magnitude of such in relation to a predetermined fault condition, further comprises the steps of: converting the output of said current transformer into a digital signal representative of said sense current; and 10 comparing said digital signal representative of said sense current with said predetermined fault condition.

26. The method according to claim 21, wherein the operation of said circuit protection device is performed routinely as a background test. 15

27. A circuit protection device as described herein with reference to Figs. 3 to 6 of the accompanying drawings.