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ATE401624T1 - Datenverarbeitungseinrichtung und verfahren zu dessen betrieb zum verhindern einer differentiellen stromverbrauchanalyse - Google Patents

Datenverarbeitungseinrichtung und verfahren zu dessen betrieb zum verhindern einer differentiellen stromverbrauchanalyse

Info

Publication number
ATE401624T1
ATE401624T1 AT99948823T AT99948823T ATE401624T1 AT E401624 T1 ATE401624 T1 AT E401624T1 AT 99948823 T AT99948823 T AT 99948823T AT 99948823 T AT99948823 T AT 99948823T AT E401624 T1 ATE401624 T1 AT E401624T1
Authority
AT
Austria
Prior art keywords
clock pulse
data processing
processing device
clock
integrated circuit
Prior art date
Application number
AT99948823T
Other languages
English (en)
Inventor
Markus Feuser
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE401624T1 publication Critical patent/ATE401624T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219Countermeasures against side channel or fault attacks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/08Randomization, e.g. dummy operations or using noise
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Recording Measured Values (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)
  • Crushing And Grinding (AREA)
AT99948823T 1998-09-30 1999-09-21 Datenverarbeitungseinrichtung und verfahren zu dessen betrieb zum verhindern einer differentiellen stromverbrauchanalyse ATE401624T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19844962 1998-09-30
DE19936938A DE19936938A1 (de) 1998-09-30 1999-08-05 Datenverarbeitungseinrichtung und Verfahren zu dessen Betrieb zum Verhindern einer differentiellen Stromverbrauchanalyse

Publications (1)

Publication Number Publication Date
ATE401624T1 true ATE401624T1 (de) 2008-08-15

Family

ID=7882872

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99948823T ATE401624T1 (de) 1998-09-30 1999-09-21 Datenverarbeitungseinrichtung und verfahren zu dessen betrieb zum verhindern einer differentiellen stromverbrauchanalyse

Country Status (3)

Country Link
KR (1) KR100718352B1 (de)
AT (1) ATE401624T1 (de)
DE (2) DE19936938A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10213268A1 (de) * 2002-03-25 2003-10-23 Infineon Technologies Ag Vorrichtung und Verfahren zum sicheren Laden von Nutzdaten
DE10217291B4 (de) * 2002-04-18 2005-09-29 Infineon Technologies Ag Datenverarbeitungsvorrichtung und Verfahren zum Betreiben eines Datenverarbeitungsmoduls
DE10360343A1 (de) * 2003-12-22 2005-07-28 Giesecke & Devrient Gmbh Tragbarer Datenträger
KR100974773B1 (ko) * 2008-08-12 2010-08-06 현대자동차주식회사 배기가스 촉매컨버터의 지지장치
GB2479871A (en) * 2010-04-26 2011-11-02 David Coyne System for preventing side channel attacks on a synchronous logic device.
US9735953B2 (en) * 2015-03-06 2017-08-15 Qualcomm Incorporated Side channel analysis resistant architecture
DE102016009045A1 (de) * 2016-07-25 2018-01-25 Detlef Fischer Zwischenschaltgerät und Betriebsverfahren dafür

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5404402A (en) * 1993-12-21 1995-04-04 Gi Corporation Clock frequency modulation for secure microprocessors

Also Published As

Publication number Publication date
DE59914806D1 (de) 2008-08-28
DE19936938A1 (de) 2000-04-06
KR20010032564A (ko) 2001-04-25
KR100718352B1 (ko) 2007-05-14

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