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NO20082569L - Fremgangsmate og anordning for justering og innstilling av elektronisk anordning - Google Patents

Fremgangsmate og anordning for justering og innstilling av elektronisk anordning

Info

Publication number
NO20082569L
NO20082569L NO20082569A NO20082569A NO20082569L NO 20082569 L NO20082569 L NO 20082569L NO 20082569 A NO20082569 A NO 20082569A NO 20082569 A NO20082569 A NO 20082569A NO 20082569 L NO20082569 L NO 20082569L
Authority
NO
Norway
Prior art keywords
adjusting
value
electronic device
state
signal
Prior art date
Application number
NO20082569A
Other languages
English (en)
Other versions
NO337514B1 (no
Inventor
Daniel Kwami Dzahini
Original Assignee
Univ Joseph Fourier
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Joseph Fourier filed Critical Univ Joseph Fourier
Publication of NO20082569L publication Critical patent/NO20082569L/no
Publication of NO337514B1 publication Critical patent/NO337514B1/no

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
    • H03F3/45968—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction
    • H03F3/45973—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using a feedback circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45212—Indexing scheme relating to differential amplifiers the differential amplifier being designed to have a reduced offset

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)
  • Feedback Control In General (AREA)
  • Amplifiers (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

Oppfinnelsen gjelder en fremgangsmåte og anordning for justering eller innstilling av en elektronisk anordning (1) som har i det minste en inngang for et eksternt inngangssignal og i det minste en utgang for et utgangssignal, og hvor verdien eller tilstanden av utgangssignalet er en funksjon av verdien eller tilstanden av inngangssignalet. En lagringskrets (9) for lagring av verdien av et justeringssignal er forbundet med en inngang for justering av den elektroniske anordning. En krets (11) øker/minsker trinnvis nevnte justeringssignal lagret i nevnte hukommelseskrets. En venderkrets (12) svitsjer nevnte inngang for den elektroniske anordning til en forutbestemt tilstand og forbinder nevnte utgang for den elektroniske anordning med nevnte hukommelseskrets via den trinnvise øknings/minskningskrets. Den trinnvise øknings/minskningskrets (11) er i stand til å justere verdien av signalet til nevnte forutbestemt tilstand, slik at verdien eller tilstanden av utgangssignalet går mot eller oppnår en forutbestemt verdi eller tilstand.
NO20082569A 2005-12-27 2008-06-09 Fremgangsmåte og anordning for justering og innstilling av elektronisk anordning NO337514B1 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0513366A FR2895599B1 (fr) 2005-12-27 2005-12-27 Procede et dispositif de reglage ou de calage d'un dispositif electronique
PCT/FR2006/002847 WO2007074231A2 (fr) 2005-12-27 2006-12-22 Procede et dispositif de reglage ou de calage d' un dispositif electronique

Publications (2)

Publication Number Publication Date
NO20082569L true NO20082569L (no) 2008-09-29
NO337514B1 NO337514B1 (no) 2016-05-02

Family

ID=37025127

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20082569A NO337514B1 (no) 2005-12-27 2008-06-09 Fremgangsmåte og anordning for justering og innstilling av elektronisk anordning

Country Status (7)

Country Link
US (1) US7737753B2 (no)
EP (1) EP1966885B1 (no)
JP (1) JP2009521887A (no)
CA (1) CA2634843C (no)
FR (1) FR2895599B1 (no)
NO (1) NO337514B1 (no)
WO (1) WO2007074231A2 (no)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5624493B2 (ja) 2011-02-16 2014-11-12 キヤノン株式会社 差動増幅装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4495470A (en) * 1983-02-07 1985-01-22 Tektronix, Inc. Offset balancing method and apparatus for a DC amplifier
CH658349A5 (fr) * 1984-05-04 1986-10-31 Centre Electron Horloger Amplificateur a compensation de la tension de decalage d'entree.
JPS62171305A (ja) * 1986-01-24 1987-07-28 Nec Corp オフセツト補償回路
JP2857949B2 (ja) * 1991-11-01 1999-02-17 株式会社デンソー 差動増幅器のオフセット電圧補償回路
JP2000004129A (ja) * 1998-06-17 2000-01-07 Toshiba Ave Co Ltd Ｃｍｏｓアナログ回路
JP3779845B2 (ja) * 1999-08-04 2006-05-31 株式会社ルネサステクノロジ バスシステムおよび情報処理装置
US6515464B1 (en) * 2000-09-29 2003-02-04 Microchip Technology Incorporated Input voltage offset calibration of an analog device using a microcontroller
US6498530B1 (en) * 2001-09-04 2002-12-24 Analog Devices, Inc. Auto-zeroed ping-pong amplifier with low transient switching
JP4246177B2 (ja) * 2005-04-28 2009-04-02 シャープ株式会社 オフセット補正回路およびオペアンプ回路

Also Published As

Publication number Publication date
US7737753B2 (en) 2010-06-15
WO2007074231A2 (fr) 2007-07-05
EP1966885A2 (fr) 2008-09-10
NO337514B1 (no) 2016-05-02
US20090128194A1 (en) 2009-05-21
EP1966885B1 (fr) 2013-02-13
FR2895599B1 (fr) 2008-06-06
CA2634843C (fr) 2015-03-31
CA2634843A1 (fr) 2007-07-05
WO2007074231A3 (fr) 2007-08-23
FR2895599A1 (fr) 2007-06-29
JP2009521887A (ja) 2009-06-04

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