NL188923B - Werkwijze ter vervaardiging van een halfgeleiderinrichting. - Google Patents
Werkwijze ter vervaardiging van een halfgeleiderinrichting.Info
- Publication number
- NL188923B NL188923B NLAANVRAGE8302383,A NL8302383A NL188923B NL 188923 B NL188923 B NL 188923B NL 8302383 A NL8302383 A NL 8302383A NL 188923 B NL188923 B NL 188923B
- Authority
- NL
- Netherlands
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE8302383,A NL188923C (nl) | 1983-07-05 | 1983-07-05 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
DE3423776A DE3423776C2 (de) | 1983-07-05 | 1984-06-28 | Verfahren zur Herstellung einer Halbleiteranordnung |
IT21721/84A IT1174221B (it) | 1983-07-05 | 1984-07-02 | Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con tale metodo |
CH3177/84A CH665308A5 (de) | 1983-07-05 | 1984-07-02 | Verfahren zur herstellung einer halbleiteranordnung. |
US06/627,308 US4535529A (en) | 1983-07-05 | 1984-07-02 | Method of making semiconductor devices by forming an impurity adjusted epitaxial layer over out diffused buried layers having different lateral conductivity types |
FR8410513A FR2548831B1 (fr) | 1983-07-05 | 1984-07-03 | Procede de realisation d'au moins une couche profonde dans un dispositif a semi-conducteur |
GB08417046A GB2143086B (en) | 1983-07-05 | 1984-07-04 | Semiconductor device manufacture |
JP59137406A JPS6037760A (ja) | 1983-07-05 | 1984-07-04 | 半導体装置の製造方法 |
CA000458184A CA1216966A (en) | 1983-07-05 | 1984-07-05 | Method of manufacturing a semiconductor device and semiconductor device manufactured by the method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8302383 | 1983-07-05 | ||
NLAANVRAGE8302383,A NL188923C (nl) | 1983-07-05 | 1983-07-05 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
Publications (3)
Publication Number | Publication Date |
---|---|
NL8302383A NL8302383A (nl) | 1985-02-01 |
NL188923B true NL188923B (nl) | 1992-06-01 |
NL188923C NL188923C (nl) | 1992-11-02 |
Family
ID=19842115
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NLAANVRAGE8302383,A NL188923C (nl) | 1983-07-05 | 1983-07-05 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
Country Status (9)
Country | Link |
---|---|
US (1) | US4535529A (nl) |
JP (1) | JPS6037760A (nl) |
CA (1) | CA1216966A (nl) |
CH (1) | CH665308A5 (nl) |
DE (1) | DE3423776C2 (nl) |
FR (1) | FR2548831B1 (nl) |
GB (1) | GB2143086B (nl) |
IT (1) | IT1174221B (nl) |
NL (1) | NL188923C (nl) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6031232A (ja) * | 1983-07-29 | 1985-02-18 | Toshiba Corp | 半導体基体の製造方法 |
US4578128A (en) * | 1984-12-03 | 1986-03-25 | Ncr Corporation | Process for forming retrograde dopant distributions utilizing simultaneous outdiffusion of dopants |
US5023193A (en) * | 1986-07-16 | 1991-06-11 | National Semiconductor Corp. | Method for simultaneously fabricating bipolar and complementary field effect transistors using a minimal number of masks |
JPH01161752A (ja) * | 1987-12-18 | 1989-06-26 | Toshiba Corp | 半導体装置製造方法 |
KR910009739B1 (ko) * | 1988-07-13 | 1991-11-29 | 삼성전자 주식회사 | 반도체장치의 제조방법 |
US5102811A (en) * | 1990-03-20 | 1992-04-07 | Texas Instruments Incorporated | High voltage bipolar transistor in BiCMOS |
JP2511784Y2 (ja) * | 1991-01-11 | 1996-09-25 | 福代 杉田 | 繊維製品用仕上機 |
US5454258A (en) * | 1994-05-09 | 1995-10-03 | Olin Corporation | Broad range moisture analyzer and method |
US5556796A (en) * | 1995-04-25 | 1996-09-17 | Micrel, Inc. | Self-alignment technique for forming junction isolation and wells |
KR19980702335A (ko) * | 1995-12-21 | 1998-07-15 | 요트. 게. 아. 롤페즈 | 리서프 반도체장치를 제조하는 방법과 이러한 방법에 의해서 제조된 반도체 장치 |
JP3304803B2 (ja) * | 1997-02-07 | 2002-07-22 | ヤマハ株式会社 | 多電源半導体装置の製造方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5190277A (en) * | 1975-02-05 | 1976-08-07 | Handotaisochino seizohoho | |
JPS5214388A (en) * | 1975-07-25 | 1977-02-03 | Hitachi Ltd | Process for complementary insulated gate semiconductor integrated circuit device |
FR2358748A1 (fr) * | 1976-07-15 | 1978-02-10 | Radiotechnique Compelec | Procede d'autoalignement des elements d'un dispositif semi-conducteur et dispositif realise suivant ce procede |
US4132573A (en) * | 1977-02-08 | 1979-01-02 | Murata Manufacturing Co., Ltd. | Method of manufacturing a monolithic integrated circuit utilizing epitaxial deposition and simultaneous outdiffusion |
US4128439A (en) * | 1977-08-01 | 1978-12-05 | International Business Machines Corporation | Method for forming self-aligned field effect device by ion implantation and outdiffusion |
JPS5493981A (en) * | 1978-01-09 | 1979-07-25 | Toshiba Corp | Semiconductor device |
US4168997A (en) * | 1978-10-10 | 1979-09-25 | National Semiconductor Corporation | Method for making integrated circuit transistors with isolation and substrate connected collectors utilizing simultaneous outdiffusion to convert an epitaxial layer |
JPS567463A (en) * | 1979-06-29 | 1981-01-26 | Hitachi Ltd | Semiconductor device and its manufacture |
NL186662C (nl) * | 1980-04-29 | 1992-03-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
NL187328C (nl) * | 1980-12-23 | 1991-08-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
JPS57134948A (en) * | 1981-02-14 | 1982-08-20 | Pioneer Electronic Corp | Semiconductor device |
JPS57136342A (en) * | 1981-02-17 | 1982-08-23 | Fujitsu Ltd | Manufacture of semiconductor device |
US4420344A (en) * | 1981-10-15 | 1983-12-13 | Texas Instruments Incorporated | CMOS Source/drain implant process without compensation of polysilicon doping |
NL8104862A (nl) * | 1981-10-28 | 1983-05-16 | Philips Nv | Halfgeleiderinrichting, en werkwijze ter vervaardiging daarvan. |
US4442591A (en) * | 1982-02-01 | 1984-04-17 | Texas Instruments Incorporated | High-voltage CMOS process |
JPS59107561A (ja) * | 1982-12-13 | 1984-06-21 | Nec Corp | 相補型絶縁ゲ−ト電界効果半導体集積回路装置 |
-
1983
- 1983-07-05 NL NLAANVRAGE8302383,A patent/NL188923C/nl not_active IP Right Cessation
-
1984
- 1984-06-28 DE DE3423776A patent/DE3423776C2/de not_active Expired - Fee Related
- 1984-07-02 CH CH3177/84A patent/CH665308A5/de not_active IP Right Cessation
- 1984-07-02 IT IT21721/84A patent/IT1174221B/it active
- 1984-07-02 US US06/627,308 patent/US4535529A/en not_active Expired - Lifetime
- 1984-07-03 FR FR8410513A patent/FR2548831B1/fr not_active Expired
- 1984-07-04 JP JP59137406A patent/JPS6037760A/ja active Granted
- 1984-07-04 GB GB08417046A patent/GB2143086B/en not_active Expired
- 1984-07-05 CA CA000458184A patent/CA1216966A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
IT8421721A0 (it) | 1984-07-02 |
DE3423776C2 (de) | 1997-07-31 |
GB2143086B (en) | 1987-03-04 |
NL188923C (nl) | 1992-11-02 |
FR2548831A1 (fr) | 1985-01-11 |
CH665308A5 (de) | 1988-04-29 |
NL8302383A (nl) | 1985-02-01 |
DE3423776A1 (de) | 1985-01-17 |
JPS6037760A (ja) | 1985-02-27 |
GB8417046D0 (en) | 1984-08-08 |
CA1216966A (en) | 1987-01-20 |
US4535529A (en) | 1985-08-20 |
JPH0412628B2 (nl) | 1992-03-05 |
IT1174221B (it) | 1987-07-01 |
GB2143086A (en) | 1985-01-30 |
FR2548831B1 (fr) | 1988-10-14 |
IT8421721A1 (it) | 1986-01-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A1B | A search report has been drawn up | ||
BC | A request for examination has been filed | ||
V1 | Lapsed because of non-payment of the annual fee |