NL154867B - Werkwijze voor de vervaardiging van een halfgeleiderinrichting, alsmede volgens deze werkwijze vervaardigde veldeffect-transistor en planaire transistor. - Google Patents
Werkwijze voor de vervaardiging van een halfgeleiderinrichting, alsmede volgens deze werkwijze vervaardigde veldeffect-transistor en planaire transistor.Info
- Publication number
- NL154867B NL154867B NL656501818A NL6501818A NL154867B NL 154867 B NL154867 B NL 154867B NL 656501818 A NL656501818 A NL 656501818A NL 6501818 A NL6501818 A NL 6501818A NL 154867 B NL154867 B NL 154867B
- Authority
- NL
- Netherlands
- Prior art keywords
- procedure
- manufacture
- accordance
- well
- semiconductor device
- Prior art date
Links
- 238000000034 method Methods 0.000 title 2
- 230000005669 field effect Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/326—Application of electric currents or fields, e.g. for electroforming
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/049—Equivalence and options
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/053—Field effect transistors fets
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/115—Orientation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Formation Of Insulating Films (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP738864 | 1964-02-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
NL6501818A NL6501818A (nl) | 1965-08-16 |
NL154867B true NL154867B (nl) | 1977-10-17 |
Family
ID=11664527
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL656501818A NL154867B (nl) | 1964-02-13 | 1965-02-12 | Werkwijze voor de vervaardiging van een halfgeleiderinrichting, alsmede volgens deze werkwijze vervaardigde veldeffect-transistor en planaire transistor. |
Country Status (4)
Country | Link |
---|---|
US (1) | US3643137A (nl) |
DE (1) | DE1514082C3 (nl) |
GB (1) | GB1100124A (nl) |
NL (1) | NL154867B (nl) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3860948A (en) * | 1964-02-13 | 1975-01-14 | Hitachi Ltd | Method for manufacturing semiconductor devices having oxide films and the semiconductor devices manufactured thereby |
US3585464A (en) * | 1967-10-19 | 1971-06-15 | Ibm | Semiconductor device fabrication utilizing {21 100{22 {0 oriented substrate material |
US3651565A (en) * | 1968-09-09 | 1972-03-28 | Nat Semiconductor Corp | Lateral transistor structure and method of making the same |
NL171309C (nl) * | 1970-03-02 | 1983-03-01 | Hitachi Ltd | Werkwijze voor de vervaardiging van een halfgeleiderlichaam, waarbij een laag van siliciumdioxyde wordt gevormd op een oppervlak van een monokristallijn lichaam van silicium. |
DE2828607C3 (de) * | 1977-06-29 | 1982-08-12 | Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa | Halbleitervorrichtung |
US5171703A (en) * | 1991-08-23 | 1992-12-15 | Intel Corporation | Device and substrate orientation for defect reduction and transistor length and width increase |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB805292A (en) * | 1953-12-02 | 1958-12-03 | Philco Corp | Semiconductor devices |
GB797687A (en) * | 1956-05-28 | 1958-07-09 | Marconi Wireless Telegraph Co | Improvements in or relating to processes for the manufacture of semi-conductor rectifiers |
GB852003A (en) * | 1958-06-10 | 1960-10-19 | Siemens Edison Swan Ltd | Improvements relating to the production of wafers of semi-conductor material |
DE1095952B (de) * | 1958-08-04 | 1960-12-29 | Philips Nv | Verfahren zur Herstellung von gleich langen Halbleiterstreifen aus einem homogenen einkristallinen Halbleiterstab fuer mehrere Halbleiteranordnungen |
US2986481A (en) * | 1958-08-04 | 1961-05-30 | Hughes Aircraft Co | Method of making semiconductor devices |
US2994811A (en) * | 1959-05-04 | 1961-08-01 | Bell Telephone Labor Inc | Electrostatic field-effect transistor having insulated electrode controlling field in depletion region of reverse-biased junction |
NL265382A (nl) * | 1960-03-08 | |||
NL267831A (nl) * | 1960-08-17 | |||
GB923153A (en) * | 1960-08-18 | 1963-04-10 | Fairchild Semiconductor | Semiconductor strain gauge |
US3045129A (en) * | 1960-12-08 | 1962-07-17 | Bell Telephone Labor Inc | Semiconductor tunnel device |
AT229371B (de) * | 1961-04-14 | 1963-09-10 | Siemens Ag | Verfahren zur Herstellung einer Halbleiteranordnung |
US3330030A (en) * | 1961-09-29 | 1967-07-11 | Texas Instruments Inc | Method of making semiconductor devices |
FR1308788A (fr) * | 1961-10-16 | 1962-11-09 | Merck & Co Inc | Matière semi-conductrice et son procédé de fabrication |
DE1867911U (de) * | 1961-12-07 | 1963-02-28 | Gerda Wilberger | Buegelbrett mit standvorrichtung. |
US3255005A (en) * | 1962-06-29 | 1966-06-07 | Tung Sol Electric Inc | Masking process for semiconductor elements |
US3384829A (en) * | 1963-02-08 | 1968-05-21 | Nippon Electric Co | Semiconductor variable capacitance element |
US3349475A (en) * | 1963-02-21 | 1967-10-31 | Ibm | Planar injection laser structure |
US3244566A (en) * | 1963-03-20 | 1966-04-05 | Trw Semiconductors Inc | Semiconductor and method of forming by diffusion |
GB1094068A (en) * | 1963-12-26 | 1967-12-06 | Rca Corp | Semiconductive devices and methods of producing them |
US3303059A (en) * | 1964-06-29 | 1967-02-07 | Ibm | Methods of improving electrical characteristics of semiconductor devices and products so produced |
-
1965
- 1965-02-12 DE DE1514082A patent/DE1514082C3/de not_active Expired
- 1965-02-12 GB GB6162/65A patent/GB1100124A/en not_active Expired
- 1965-02-12 NL NL656501818A patent/NL154867B/nl not_active IP Right Cessation
-
1969
- 1969-02-10 US US431677*[A patent/US3643137A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE1514082B2 (de) | 1974-04-25 |
NL6501818A (nl) | 1965-08-16 |
US3643137A (en) | 1972-02-15 |
DE1514082A1 (de) | 1969-09-18 |
DE1514082C3 (de) | 1984-08-30 |
GB1100124A (en) | 1968-01-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NL80 | Information provided on patent owner name for an already discontinued patent |
Owner name: HITACHI SEISA |
|
V4 | Discontinued because of reaching the maximum lifetime of a patent |