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Ebrahimi et al., 2022 - Google Patents

Rapid: Approximate pipelined soft multipliers and dividers for high throughput and energy efficiency

Ebrahimi et al., 2022

Document ID
18245855890909487658
Author
Ebrahimi Z
Zaid M
Wijtvliet M
Kumar A
Publication year
Publication venue
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

External Links

Snippet

The rapid updates in error-resilient applications along with their quest for high throughput has motivated designing fast approximate functional units for field-programmable gate arrays (FPGAs). Studies have proposed various imprecise functional techniques, albeit …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
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    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
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