[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Jin et al., 2013 - Google Patents

Design of spaceborne SAR imaging processing and fast Verification Based on FPGA

Jin et al., 2013

Document ID
17304858477016472633
Author
Jin L
Liang C
Ying L
Yizhuang X
Publication year
Publication venue
IET International Radar Conference 2013

External Links

Snippet

Realization of real-time processing for spaceborne synthetic aperture radar (SAR) based on FPGA is a tough work because of its complicated algorithm, huge data and difficulty of debugging on board. This paper first analyses the characteristic of FPGA and puts forward …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/14Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141Discrete Fourier transforms
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30Information retrieval; Database structures therefor; File system structures therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BINDEXING SCHEME RELATING TO CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. INCLUDING HOUSING AND APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B60/00Information and communication technologies [ICT] aiming at the reduction of own energy use
    • Y02B60/10Energy efficient computing
    • Y02B60/12Reducing energy-consumption at the single machine level, e.g. processors, personal computers, peripherals, power supply
    • Y02B60/1232Acting upon peripherals
    • Y02B60/1235Acting upon peripherals the peripheral being a bus

Similar Documents

Publication Publication Date Title
CN106294239B (en) A kind of peripheral bus APB bus bridge
CN103092194B (en) Performance test device and method of general servo mechanism based on universal serial bus (USB)
CN103955447A (en) FFT accelerator based on DSP chip
Jin et al. Design of spaceborne SAR imaging processing and fast Verification Based on FPGA
CN102799412A (en) CORDIC (coordinate rotation digital computer) accelerator based on parallel pipeline design
CN103577161A (en) Big data frequency parallel-processing method
CN105955705B (en) A Reconfigurable Multi-Channel Detection Algorithm Accelerator
CN114626005A (en) An FPGA Implementation Method of CS Algorithm in Video SAR Real-time Imaging
CN102523374B (en) A real-time parallel electronic image stabilization system design method
CN102353940B (en) Pulse compression optimization method based on field programmable gate array (FPGA)
Ma et al. Design and implementation of an advanced DMA controller on AMBA-based SoC
Hou et al. An FPGA-based multi-core system for synthetic aperture radar data processing
Wang et al. Video SAR high-speed processing technology based on FPGA
CN117150310A (en) An FPGA-based fast Fourier transform spectrum extraction optimization method
CN101620643B (en) Design method of architecture simulating system based on FPGA
Savich et al. A Low‐Power Scalable Stream Compute Accelerator for General Matrix Multiply (GEMM)
Luan et al. A new high–speed FPGA and Ethernet Based Embedded Data Acquisition System
Gong et al. Implementation of Multi-channel FIFO in One BlockRAM with Parallel Access to One Port.
CN218996036U (en) High-speed low-power-consumption FFT chip with SPI interface
Chandrakanth et al. Customized architecture for implementing configurable FFT on FPGA
CN109117454B (en) 3780-point fast Fourier transform processor and its operation method
CN112163187B (en) Ultra-long point high-performance FFT (fast Fourier transform) computing device
Hu et al. Design of on-chip debug module based on MCU
BABU et al. A Sophisticated OCP to AHB Bus Interface Enriched With IEEE 1149.1 Test Mechanism
CN118171022A (en) An electromagnetic solution algorithm for Laplace equation based on FPGA