Anguita et al., 1997 - Google Patents
A low-power CMOS implementation of programmable CNN's with embedded photosensorsAnguita et al., 1997
View PDF- Document ID
- 16338276212195738996
- Author
- Anguita M
- Pelayo F
- Fernandez F
- Prieto A
- Publication year
- Publication venue
- IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
External Links
Snippet
In this brief, an analog CMOS implementation of a Cellular Neural Network (CNN) is presented, which is based on a combination of MOS transistors operating in different modes: weak and strong-inversion and MOS transistors operated in the lateral bipolar mode. This …
- 230000001537 neural 0 abstract description 22
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06N—COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computer systems based on biological models
- G06N3/02—Computer systems based on biological models using neural network models
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
- G06N3/0635—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means using analogue means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06K—RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K9/00—Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
- G06K9/36—Image preprocessing, i.e. processing the image information without deciding about the identity of the image
- G06K9/46—Extraction of features or characteristics of the image
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Kinget et al. | A programmable analog cellular neural network CMOS chip for high speed image processing | |
Espejo et al. | A CNN universal chip in CMOS technology | |
Dominguez-Castro et al. | A 0.8-/spl mu/m CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage | |
Suarez et al. | Low-power CMOS vision sensor for Gaussian pyramid extraction | |
Milev et al. | Analog implementation of ANN with inherent quadratic nonlinearity of the synapses | |
Harrer et al. | A current-mode DTCNN universal chip | |
Bhaduri et al. | Spiking neural classifier with lumped dendritic nonlinearity and binary synapses: a current mode VLSI implementation and analysis | |
Anguita et al. | Analog CMOS implementation of a discrete time CNN with programmable cloning templates | |
Liu et al. | The circuit realization of a neuromorphic computing system with memristor-based synapse design | |
Anguita et al. | A low-power CMOS implementation of programmable CNN's with embedded photosensors | |
Zambrano et al. | All-analog silicon integration of image sensor and neural computing engine for image classification | |
Brucoli et al. | Associative memory design using discrete-time second-order neural networks with local interconnections | |
EP0767442B1 (en) | Computing circuit having instantaneous recognition function and instantaneous recognition method | |
Krieg et al. | Analog signal processing using cellular neural networks | |
Wu et al. | A learnable cellular neural network structure with ratio memory for image processing | |
Chou et al. | VLSI design of optimization and image processing cellular neural networks | |
Laiho et al. | Template design for cellular nonlinear networks with 1-bit weights | |
Anguita et al. | VLSI implementations of CNNs for image processing and vision tasks: single and multiple chip approaches | |
Chua et al. | Cellular neural networks and analog VLSI | |
Li et al. | A 0.7 v low-power fully programmable gaussian function generator for brain-inspired gaussian correlation associative memory | |
Carmona et al. | CMOS realization of a 2-layer CNN universal machine chip | |
Rodríguez Vázquez et al. | Accurate design of analog CNN in CMOS digital technologies | |
Kinget et al. | Analogue CMOS VLSI implementation of cellular neural networks with continuously programmable templates | |
US5630021A (en) | Hamming neural network circuit | |
Poikonen et al. | Implementing grayscale morphological operators with a compact ranked order extractor circuit |