[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Roy et al., 2016 - Google Patents

Effect of back oxide thickness of FDSOI on SRAM performance

Roy et al., 2016

Document ID
10365139118887411100
Author
Roy S
Mukherjee S
Dutta A
Sarkar C
Publication year
Publication venue
Superlattices and Microstructures

External Links

Snippet

In this work a 6 Transistor SRAM circuit is designed and simulated with FDSOI device whose Channel length (L CH) and Buried Oxide (BOX) thickness (T box) is varied to observe the effects on the circuit performance in terms of stability, power consumption and delay. The L …
Continue reading at www.sciencedirect.com (other versions)

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/785Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Complementary MIS field-effect transistors
    • H01L27/0924Complementary MIS field-effect transistors including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices

Similar Documents

Publication Publication Date Title
Mohapatra et al. The role of geometry parameters and fin aspect ratio of sub-20nm SOI-FinFET: an analysis towards analog and RF circuit design
Mushtaq et al. Design and analysis of INDEP FinFET SRAM cell at 7‐nm technology
Islam et al. Variation resilient subthreshold SRAM cell design technique
Ekekwe et al. Power dissipation sources and possible control techniques in ultra deep submicron CMOS technologies
Kumar et al. Nanosheet field effect transistor device and circuit aspects for future technology nodes
Mushtaq et al. Performance analysis for reliable nanoscaled FinFET logic circuits
Kumar et al. Process evaluation in FinFET based 7T SRAM cell
Chiang A short-channel-effect-degraded noise margin model for junctionless double-gate MOSFET working on subthreshold CMOS logic gates
Tripathi et al. Implementation of low-power 6T SRAM cell using MTCMOS technique
Patil et al. Underlap channel metal source/drain SOI MOSFET for thermally efficient low-power mixed-signal circuits
Huang et al. Investigation of negative DIBL effect for ferroelectric-based FETs to improve MOSFETs and CMOS circuits
Kim et al. Design optimization and performance projections of double-gate FinFETs with gate–source/drain underlap for SRAM application
Roy et al. Effect of back oxide thickness of FDSOI on SRAM performance
Mishra et al. Area efficient layout design of CMOS circuit for high-density ICs
Mishra et al. Performance Analysis of Fully Depleted Ultra Thin-Body (FD UTB) SOI MOSFET based CMOS Inverter Circuit for Low Power Digital Applications
Ravi Kumar A review of low-power VLSI technology developments
Ruhil et al. A 7T high stable and low power SRAM cell design using QG-SNS FinFET
Kumar et al. An improved SOI CMOS technology based circuit technique for effective reduction of standby subthreshold leakage
Naik et al. Effects of metal work function and gate-oxide dielectric on super high frequency performance of a non-align junction DG-MOSFET based inverter in the sub-100 nm regime: a TCAD simulation analysis
Haq et al. Reliable and ultra-low power approach for designing of logic circuits
Singh et al. Analysis of the effect of temperature variations on sub-threshold leakage current in P3 and P4 SRAM cells at deep sub-micron CMOS technology
Mishra et al. Performance analysis of fully depleted SOI tapered body reduced source (FD-SOI TBRS) MOSFET for low power digital applications
Yadav et al. Assessment of read and write stability for 6T SRAM cell based on charge plasma DLTFET
Kumar et al. Variable gate oxide thickness MOSFET: A device level solution for sub-threshold leakage current reduction
Mukherjee et al. U shaped vertical gate bulk MOSFET for area minimization