FFFF Disconnect debug-related pins from GPIO by default in OpenTitan by jwnrt · Pull Request #3809 · tock/tock · GitHub
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Disconnect debug-related pins from GPIO by default in OpenTitan #3809

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Merged
merged 1 commit into from
Jan 22, 2024

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jwnrt
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@jwnrt jwnrt commented Jan 22, 2024

Pull Request Overview

This PR changes the default pinmux configuration of the TAP strap pins in OpenTitan Earl Grey.

The two TAP straps are used to select which JTAG TAP (test access point) is connected to the JTAG pins. This is commonly used to select either the RISC-V debug module or the OpenTitan lifecycle controller.

Most OpenTitan lifecycle states will sample these pins once on boot and use that TAP until reset. The RMA lifecycle state samples these pins continuously. Connecting them to GPIO prevents connecting a debugger as the TAP straps are changed once the pinmux is configured.

Testing Strategy

I tested this by connecting OpenOCD to an Earl Grey bitstream in RMA mode running Tock.

Before this change, trying to connect would give this error message:

Open On-Chip Debugger 0.12.0
Licensed under GNU GPL v2
For bug reports, read
    http://openocd.org/doc/doxygen/bugs.html
trst_only separate trst_push_pull

Info : Hardware thread awareness created
force hard breakpoints
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : clock speed 500 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: riscv.tap: IR capture error; saw 0x1f not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: Unsupported DTM version: 15
Warn : target riscv.tap.0 examination failed
Info : starting gdb server for riscv.tap.0 on 3333
Info : Listening on port 3333 for gdb connections

We could only connect pre-pinmux configuration. With this change applied, we can connect after the pinmux connection. There is a separate issue that breaks debugging at another stage, but I'm still working that one out.

TODO or Help Wanted

Is floating these pins the right fallback? They can still be pinmuxed to GPIO pins manually if you want to use them for that I believe.

Documentation Updated

  • Updated the relevant files in /docs, or no updates are required.

Formatting

  • Ran make prepush.

@github-actions github-actions bot added the WG-OpenTitan In the purview of the OpenTitan working group. label Jan 22, 2024
lschuermann
lschuermann previously approved these changes Jan 22, 2024
bradjc
bradjc previously approved these changes Jan 22, 2024
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lschuermann commented Jan 22, 2024

There is a separate issue that breaks debugging at another stage, but I'm still working that one out.

@jwnrt I spent quite some time making the RISC-V debug module play well with the ePMP in #3597, in case that happens to be related to the issues you're experiencing. Might be worth testing with those changes integrated, I hope they'll be merged any day now. The current PMP implementation has caused a bunch of issues using the RVDM for me, and is broken in many other ways.

You'll want to instantiate the EarlGreyEPMP with DBG = EPMPDebugEnable, which will switch to a configuration without Machine-Mode Lockdown enabled, as that's fundamentally incompatible with RVDM.

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jwnrt commented Jan 22, 2024

@lschuermann looks like that resolved the other problem - thanks!

These TAP straps are used to select whether Earl Grey's lifecycle
controller or RISC-V debugger are connected to the JTAG TAP. These pins
are sampled continuously in RMA mode, so we don't want to drive them by
default.
@jwnrt jwnrt dismissed stale reviews from bradjc and lschuermann via 8bf7cf4 January 22, 2024 15:47
@jwnrt jwnrt force-pushed the jtag-pinmux-defaults branch from ca82c64 to 8bf7cf4 Compare January 22, 2024 15:47
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jwnrt commented Jan 22, 2024

Rebased to fix conflict.

@bradjc bradjc added this pull request to the merge queue Jan 22, 2024
Merged via the queue into tock:master with commit d48d359 Jan 22, 2024
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