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[CI] Enable HIP and CUDA plugins in GitHub Actions builds #5087
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@jchlanda @AerialMantis I see two tests failing despite this seems to be the default environment according to GSG. Have you seen similar failures before? https://github.com/intel/llvm/runs/4428671041?check_suite_focus=true |
Instructions to reproduce locally sudo docker run -it -u sycl:sycl ghcr.io/intel/llvm/ubuntu2004_build:latest /bin/bash
cd ~
git clone https://github.com/intel/llvm.git --depth=1
cd llvm
mkdir build
cd build
CUDA_LIB_PATH="/usr/local/cuda/lib64/stubs" python ../buildbot/configure.py --ci-defaults --cuda --hip
ninja check-clang |
The `-target` parameter of the offload wrapper was renamed to `-host` a while back on the SYCL branch. This fixes one of the issues seen in intel#5087
The `-target` parameter of the offload wrapper was renamed to `-host` a while back on the SYCL branch. This fixes one of the issues seen in #5087
@alexbatashev, #5103 should fix |
* upstream/sycl: (725 commits) [SYCL] Translate ZE_RESULT_ERROR_INVALID_ARGUMENT error code from L0 RT (intel#5122) [SYCL][L0][Plugin] Call ZeCommandQueueCreate on demand (intel#5109) [SYCL] Switch to using blocking USM free for OpenCL GPU (intel#4928) [CI] Disable pack and upload steps (intel#5119) [SYCL] Disable submission of AssertInfoCopier for FPGA (intel#4780) [SYCL][SPIRV] Implement islessgreater with FOrdNotEqual instead (intel#5076) [SYCL] Fix typo in the name of the host-visible pool (intel#5073) [SYCL] Only call shutdown when DLL is being unloaded, not when process is terminating (intel#4983) [SYCL][CUDA][PI] Fix infinite loop when parallel_for range exceeds INT_MAX (intel#5095) [SYCL] Translate out-of-memory error codes from L0 RT (intel#5107) [SYCL] Fix a few warnings during build scripts configuration (intel#5082) [SYCL] Fix amdgpu openmp test (intel#5103) [SYCL] [FPGA] Create experimental headers for FPGA latency control (intel#5066) [SYCL][CUDA] Don't enqueue an event wait on same CUDA stream (intel#5099) Remove PR disable template (intel#5102) [BuildBot]Uplift CPU/FPGAEMU RT version (intel#5078) [SYCL] Fix the test to not depend on a specific line. (intel#5092) [CI] Provide libclc targets to build and test (intel#5091) Fix build of `check-llvm-spirv` target after 8f8001a Force opt to use new pass manager in pr52289 test after c34d157 ...
@@ -128,6 +131,8 @@ jobs: | |||
- name: check-sycl | |||
if: always() | |||
run: | | |||
# TODO consider moving this to Dockerfile | |||
export LD_LIBRARY_PATH=/usr/local/cuda/compat/:/usr/local/cuda/lib64:$LD_LIBRARY_PATH |
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According to https://intel.github.io/llvm-docs/GetStartedGuide.html#build-dpc-toolchain-with-support-for-nvidia-cuda, this should not be required. I suggest filing an issue to investigate what is wrong here. Maybe NVIDIA docker image is not configured correctly.
I have the same question regarding --hip-amd-arch
option. I don't see it listed as required option in the GetStartedGuide. Should we add it there?
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Maybe NVIDIA docker image is not configured correctly.
That is actually the case
I have the same question regarding --hip-amd-arch option. I don't see it listed as required option in the GetStartedGuide. Should we add it there?
It is mentioned here: https://intel.github.io/llvm-docs/GetStartedGuide.html#run-in-tree-lit-tests
The option is not required to build the compiler, only to test it.
* sycl: [CI] Refactor workflow files (intel#5134) [CI] Enable HIP and CUDA plugins in GitHub Actions builds (intel#5087) [SYCL] Implement queue flushing (intel#5052) [SYCL] Allow library mismatch for libdevice host object on Win32 (intel#5048) [SYCL] Remove unnecessary template parameter (intel#5127) [CI] Use clang-format from nightly builds (intel#5126)
* upstream/sycl: (5961 commits) [SYCL] Implement discard_events extension (intel#5026) [SYCL][NFC] Fix unused parameter warning in piQueueFlush (intel#5139) [SYCL][XPTI] Fix static analysis tool warnings (intel#5040) [CI] Switch post-commit jobs to self-hosted runners (intel#5147) [SYCL] Fix support for classes implicitly converted from items in parallel_for (intel#5118) [SYCL][HIP] Fix platform query in USM alloc info (intel#5140) [Docker] Add workarounds for two SYCL issues (intel#5143) [CI] Install cm-compiler in drivers image (intel#5128) [ESIMD] Add support for an arbitrary number of elements to simd::copy_from/to (intel#5135) [SYCL] Add number HW threads per EU query (intel#4901) [CI] Refactor workflow files (intel#5134) [CI] Enable HIP and CUDA plugins in GitHub Actions builds (intel#5087) [SYCL] Implement queue flushing (intel#5052) Disable issue labeler in LLVM forks Modify translation for disable_loop_pipelining metadata Add SPIR-V friendly translation for OpLoad and OpStore Fix return type postfix for SPIR-V Friendly IR Restrict special handling of sampler OpVariable only to UniformConstant Add lowering for llvm.bswap intrinsic Fix translation of OpVariable with OpSamplerType ...
Build all supported targets as part of the main build step. The idea is to build compiler toolchain once and distribute binary artifacts across machines to run the required testing.
Also this patch adds option to disable some tests, that require real hardware. Those must be moved to intel/llvm-test-suite, as instructed by contributing guidelines.