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cv32a60x-v6.0.0

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Add back ICACHE/DCACHE CSRs, update Yaml+adocs. Fix design doc Makefi…

…le. (#2937)

v5.3.0

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Update ID stage to support ZCMP, ZCMT and CVXIF with Superscalar (#2756)

Add support for Superscalar with ZCMP, ZCMT and CVXIF.
ZCMP decoder, ZCMT decoder and CVXIF interface driver are using port 0.
Standard RVC and 32 bits instruction can take port 0 or 1.

v5.2.0

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mmu: Fix pmpcfg, pmpaddr width (#2707)

PR #2692 changed the bus width for `pmpcfg` and `pmpaddr` in most
modules. Do the same in `cva6_mmu` and `cva6_ptw` to fix port width
mismatches.

20240827.feature.interconnect

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Feat: add add cva6_hpdcache_icache_if_adapter (supports the simplifie…

…d icache kill mechanism) (#2269)

v5.1.0

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Mmu design document (#2117)

v5.0.1

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csr_regfile.sv: use CVA6Cfg.ASID_WIDTH instead of AsidWidth (fix cv64…

…a6) (#1956)

v5.0.0

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fix some bad assignments and lint warning related to RVFI feature (#1947

)

v4.2.0

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Release 4.2.0

v4.1.2

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Merge pull request #203 from msfschaffner/ariane-4.1.2-release

Fix license headers of FPU files (fix #202)

v4.1.1

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msfschaffner Michael Schaffner
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Ariane 4.1.1
0