94 GHz down-conversion mixer with gain enhanced Gilbert cell in 90 nm CMOS
A 94 GHz down-conversion mixer for image radar sensors using standard 90 nm CMOS technology is reported. The down-conversion mixer comprises a double-balanced Gilbert cell with an LC-tank-oscillator-based RF transconductance stage load for conversion ...
A multi-band low noise amplifier with strong immunity to interferers
A multi-band low noise amplifier (LNA) is designed to operate over a wide range of frequencies (with center frequencies at 1.2, 1.7 and 2.2 GHz respectively) using an area efficient switchable $$\pi$$ź network. The LNA can be tuned to different gain and ...
Low power PLL with reduced reference spur realized with glitch-free linear PFD and current splitting CP
This work has been focused on designing a phase locked loop (PLL) operating in the GHz range with reduced reference spur and power requirement suitable for wireless communication applications such as wireless receivers, serial link trans-receivers and ...
3.6 mw low power wireless RF receiver front end using creative current recycle technique
This paper presents the design of low noise amplifier and mixer (LIXER) circuit for wireless receiver front ends using 65 nm CMOS technology. The circuit is implemented with CMOS transistors and uses 65 nm CMOS process. Proposed LIXER circuit achieves a ...
A 90---96 GHz CMOS down-conversion mixer with high conversion gain and excellent LO---RF isolation
A 90---96 GHz down-conversion mixer for 94 GHz image radar sensors using standard 90 nm CMOS technology is reported. RF negative resistance compensation technique, i.e. NMOS LC-oscillator-based RF transconductance (GM) stage load, is used to increase ...
A New Method Modifying Single Miller Feedforward Frequency Compensation to Drive Large Capacitive Loads: Putting an Attenuator in the Path
A new method to compensate three-stage amplifier to drive large capacitive loads is proposed in this paper. Gain Bandwidth Product is increased due to use an attenuator in the path of miller compensation capacitor. Analysis demonstrates that the gain ...
Low leakage and high CMRR CMOS differential amplifier for biomedical application
A novel, competent, effortless, low leakage CMOS differential amplifier is explored with minimum deformation and proper power utilization. The proposed circuit can also represent a CMOS analog front-end (AFE) circuit for portable biomedical signals ...
Four Input Single Output based third order universal filter using Four Terminal Floating Nullor
This paper presents a Four Input Single Output based third order universal filter that offers all five sections of filter frequency responses with some passive components using active block named as Four Terminal Floating Nullor (FTFN). The design ...
Continuous-time analog filter with passband constant IIP3 based on common-gate amplifier
This paper presents an analog filter based on Rauch biquadratic cell. The filter exploits an improved analog stage that makes linearity performance uniform over the entire pass-band frequency region. All feedback analog filters suffer from poor ...
On gm-boosted follower-amplifier and its novel circuit transformation based mid-band derivations
This brief paper investigates the small-signal mid-band behavior of gm-boosted follower-amplifiers which has not been explored previously and whose analysis is not available in text-books or any other source. Both gm-boosted source follower and gm-...
Body controlled threshold voltage shifting variable gain current mirror
A body controlled threshold voltage shifting scheme is proposed to realize a variable gain current mirror structure. The proposed structure utilizes the body terminals of MOS transistors to vary the threshold voltage and consequently the mirroring gain ...
Fully digital fast transient phase-locked digital LDO-embedded-MDLL for DVFS applications
This paper presents a multiplying delay-locked loop (MDLL) embedded with a frequency-only reference (FREF) based fully digital low-dropout regulator (DLDO) that outperforms conventional dynamic voltage and frequency scaling circuits when driving digital-...
High-temperature characterisation and analysis of leakage-current-compensated, low-power bandgap temperature sensors
This paper analyses leakage current compensation techniques for low-power, bandgap temperature sensors. Experiments are conducted for circuits that compensate for collector-substrate, collector-base, body-drain and source-body leakage currents in a ...
A low-power low-jitter DLL with a differential closed-loop duty cycle corrector
A low-power low-jitter delay locked loop (DLL) with a first order differential closed-loop duty cycle corrector (DCC) is presented in this paper. The proposed DCC has a differential closed-loop structure that corrects the input clock duty cycle from 10 ...
A 0.5-V all-digital clock-deskew buffer with I/Q phase outputs
This paper proposes a low supply voltage all-digital clock-deskew buffer with in-phase and quadrature phase (I/Q) outputs on an intra-chip. In some application-specific integrated chips or silicon intellectual properties might enter hibernation mode to ...
Low power VLSI architecture design of BMC, BPSC and PC schemes
Line coding is used to tune the wave form based on the properties of the physical channel. Bi-Phase Mark Coding (BMC), Bi-Phase Space Coding (BPSC) and Phase Coding (PC) are used as Line coding techniques. The first objective of the proposed work is to ...
Bulk-driven class AB fully-balanced differential difference amplifier
This paper presents a new low-voltage class AB fully-balanced differential difference amplifier (FB-DDA) employing the bulk-driven technique. At the FB-DDA differential pairs the bulk terminal of the MOS transistors are used as signal inputs in order to ...