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- ArticleApril 2006
An indirect current sensing technique for IDDQ and IDDT tests
GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSIPages 235–240https://doi.org/10.1145/1127908.1127964An indirect current sensing technique for IDDQ and IDDT tests is proposed in this paper. This is accomplished by utilizing the pervasive on-chip voltage regulators and thus have little or no impact on CUT's design and its performance. We demonstrate ...
- ArticleSeptember 2005
Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logic
SBCCI '05: Proceedings of the 18th annual symposium on Integrated circuits and system designPages 62–67https://doi.org/10.1145/1081081.1081103In this paper, we propose a new approach for using Built-in Current Sensor (BICS) to detect not only transient upsets in sequential logic but also in combinational circuits. In this approach, the BICS is connected in the design bulk to increase its ...