Cited By
View all- Hsu SYang KMilor L(2019)Machine Learning for Detection of Competing Wearout Mechanisms2019 IEEE International Reliability Physics Symposium (IRPS)10.1109/IRPS.2019.8720533(1-9)Online publication date: 31-Mar-2019
Microprocessor Aging Analysis and Reliability Modeling Due to Back-End Wearout Mechanisms
Pages 2065 - 2076
Abstract
Back-end wearout mechanisms are major reliability concerns for modern microprocessors. In this paper, a framework that contains modules for back-end time-dependent dielectric breakdown, electromigration, and stress-induced voiding is proposed to analyze circuit layout geometries and interconnects to estimate state-of-the-art microprocessor lifetime due to each mechanism. Our methodology incorporates the detailed electrical stress temperature, linewidth, and cross-sectional areas of each interconnect/via within the microprocessor system. Different workloads are considered to evaluate aging effects in single-core microprocessors running applications with realistic use conditions.
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Published: 01 October 2015
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View all- Hsu SYang KMilor L(2019)Machine Learning for Detection of Competing Wearout Mechanisms2019 IEEE International Reliability Physics Symposium (IRPS)10.1109/IRPS.2019.8720533(1-9)Online publication date: 31-Mar-2019