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Compaction of two-level microprograms for a multiprocessor computer

Published: 01 December 1984 Publication History

Abstract

An optimizing loader has been designed and developed for two-level microprograms of a multiprocessor computer. In the computer, a microinstruction activates nanoprograms in multiprocessors, specifying nanoprogram start address and the processors to be activated. This scheme allows the loader to utilize the same nanoprogram among several microinstructions, which activate it, and compact the nanoaddress space by nanocode movement. The experimental results show that (i) the nanoprogram sizes are reduced from 17.3 to 31.0 % and (ii) the effect of the reduction is proportional to the number of microinstructions.

References

[1]
Baba. T., Hashimoto, N., Yamazaki, K., and Okuda. K.: "Microprogramming Support System for a Two-Level Microprogrammed Computer MUNAP," Trans. IECE Japan, (Oct. 1982), pp. 1256-1272.
[2]
Baba. T., Ishikawa, K., and Okuda, K.: "A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions," IEEE Trans. Comput., (Dec. 1982), pp. 1142-1156.
[3]
Baba. T., Yamazaki, K., Hashimoto, N., Kanai. H., Okuda, K. and Hashimoto, K.: "Experimentation with a Two-Level Microprogrammed Multiprocessor Computer," Proc. MICRO-16, (Oct. 1983), pp. 47-54.
[4]
Frieder, G., and Miller. J.: "An Analysis of Code Density for the Two-Level Programmable Control of the Nanodata QM-1," Proc. MICRO-10, (1977). pp. 26-32.
[5]
Kartashev. S.P., and Kartashev S.I., Editor: "Special Issue of Supersystems for the 80's." Computer (Nov. 1980).
[6]
Rideout, D.J.: "Considerations for Local Compaction of Nanocode for the Nanodata QM-1," Proc. MICRO- 14, (1981), pp. 205-214.
[7]
Sano, T., Baba, T., Yamazaki, K., Suzuki, S., and Okuda, K.: Software Testing through Tagged Architecture," (tentative title in English), 28-th Annu. Conf. of Infor. Proc. Soci. of Japan, (March 1984), pp. 623-624.
[8]
Stritter, S.: "Microprogrammed Implementation of a Single Chip Microprocessor." Proc. MICRO-11, (1978), pp. 8-16.
[9]
Yamazaki, K., et al.: "Development of a System Description Language for a Two-Level Microprogrammed Computer MUNAP." Trans. IECE Japan, (Jan. 1984), pp. 149-156.

Cited By

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  • (2007)Architectural evaluation of a universal host computer munapSystems and Computers in Japan10.1002/scj.469017100817:10(78-87)Online publication date: 21-Mar-2007

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Information

Published In

cover image ACM SIGMICRO Newsletter
ACM SIGMICRO Newsletter  Volume 15, Issue 4
MICRO 17: Proceedings of the Seventeenth Annual Microprogramming Workshop
Dec. 1984
302 pages
ISSN:1050-916X
DOI:10.1145/384281
Issue’s Table of Contents
  • cover image ACM Conferences
    MICRO 17: Proceedings of the 17th annual workshop on Microprogramming
    December 1984
    325 pages

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 December 1984
Published in SIGMICRO Volume 15, Issue 4

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  • (2007)Architectural evaluation of a universal host computer munapSystems and Computers in Japan10.1002/scj.469017100817:10(78-87)Online publication date: 21-Mar-2007

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