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Patchable control store for reduced microcode risk in a VLSI VAX microcomputer

Authors:

Richard E. Calcagni,

Will SherwoodAuthors Info & Claims

ACM SIGMICRO Newsletter, Volume 15, Issue 4

Pages 70 - 76

https://doi.org/10.1145/384281.808216

Published: 01 December 1984 Publication History

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Abstract

A VLSI VAX microcomputer, which implements the native VAX computer architecture and instruction set, uses 16K by 40 bits of ROM control store. To decrease the cost of making changes to released microcode, the hardware supports a patching mechanism whereby control flow can be switched between the read-only control memory and a smaller writable control memory. This paper describes the system design considerations that led to the development of the patchable control store, actual implementation of the control store, the effectiveness of the patching scheme, and its impact on system performance.

References

[1]

VAX Architecture Reference Manual. Revision 6.1. Digital Equipment Corp., Bedford. Mass., 1982.

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[2]

W.J. Bauer et al., "Read-only Store Patching Methodology." IBM Tech Disel Bulietin. vol. 22, no. 1, pp. 350-2, June. 1979.

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[3]

W.N. Johnson, "A VLSI VAX Chip Set," ISSCC Digest of Technical Papers. pp. 174- 175, 1984.

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[4]

Dileep Bhandarkar. "Architecture Management for Ensuring Software Compatibility in the VAX Family of Computers," IEEE Computer, pp. 87-93. Feb., 1982.

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[5]

D.W. Clark and H.M. Levy. "Measurement and Analysis of Instruction Use in the VAX-11/780." Proc. 9th Annual Symposium on Computer Architecture. vol. 10. no. 3, pp. 9-17. April. 1982.

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Corliss MLewis ERoth A(2003)DISE: a programmable macro engine for customizing applications30th Annual International Symposium on Computer Architecture, 2003. Proceedings.10.1109/ISCA.2003.1207014(362-373)Online publication date: 2003
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Corliss MLewis ERoth A(2003)DISEACM SIGARCH Computer Architecture News10.1145/871656.85966031:2(362-373)Online publication date: 1-May-2003
https://dl.acm.org/doi/10.1145/871656.859660
Corliss MLewis ERoth AGottlieb ALi K(2003)DISEProceedings of the 30th annual international symposium on Computer architecture10.1145/859618.859660(362-373)Online publication date: 9-Jun-2003
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Index Terms

Patchable control store for reduced microcode risk in a VLSI VAX microcomputer
1. Computer systems organization
  1. Architectures
    1. Serial architectures
2. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Read-only memory
  2. Very large scale integration design

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Information & Contributors

Information

Published In

ACM SIGMICRO Newsletter Volume 15, Issue 4

MICRO 17: Proceedings of the Seventeenth Annual Microprogramming Workshop

Dec. 1984

302 pages

ISSN:1050-916X

DOI:10.1145/384281

Issue’s Table of Contents

MICRO 17: Proceedings of the 17th annual workshop on Microprogramming
December 1984
325 pages
Chairmen:
M. Carter,
R. A. Mueller

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 December 1984

Published in SIGMICRO Volume 15, Issue 4

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Corliss MLewis ERoth A(2003)DISE: a programmable macro engine for customizing applications30th Annual International Symposium on Computer Architecture, 2003. Proceedings.10.1109/ISCA.2003.1207014(362-373)Online publication date: 2003
https://doi.org/10.1109/ISCA.2003.1207014
Corliss MLewis ERoth A(2003)DISEACM SIGARCH Computer Architecture News10.1145/871656.85966031:2(362-373)Online publication date: 1-May-2003
https://dl.acm.org/doi/10.1145/871656.859660
Corliss MLewis ERoth AGottlieb ALi K(2003)DISEProceedings of the 30th annual international symposium on Computer architecture10.1145/859618.859660(362-373)Online publication date: 9-Jun-2003
https://dl.acm.org/doi/10.1145/859618.859660
Agarwal ASites RHorowitz MAiso H(1986)ATUM: a new technique for capturing address traces using microcodeProceedings of the 13th annual international symposium on Computer architecture10.5555/17407.17370(119-127)Online publication date: 1-Jun-1986
https://dl.acm.org/doi/10.5555/17407.17370
Agarwal ASites RHorowitz M(1986)ATUM: a new technique for capturing address traces using microcodeACM SIGARCH Computer Architecture News10.1145/17356.1737014:2(119-127)Online publication date: 1-May-1986
https://dl.acm.org/doi/10.1145/17356.17370

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