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Experimental Polyprocessor System (EPOS)—architecture

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Hiroshi KasaiAuthors Info & Claims

ISCA '79: Proceedings of the 6th annual symposium on Computer architecture

Pages 188 - 195

https://doi.org/10.1145/800090.802909

Published: 23 April 1979 Publication History

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Abstract

The Experimental Polyprocessor System (EPOS) is described. It is a new computer system based on the concept of the polyprocessor and is intended to obtain a high degree of extensibility, cost/performance, adaptability and reliability. EPOS is composed of computing modules, input/output modules, and shared memory modules which are connected by multiple independent common buses. Modules and system buses can be added or deleted freely to provide a high degree of extensibility. The computing module is using a 7000-gate LSI computing element PULCE and provides extensive support for user and dynamic microprogramming. The input/output modules and the computing modules are connected equally to the system buses, and the same addressing mechanism is applied to them.

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Cited By

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Maekawa MSakamura KIshikawa C(1982)Firmware structure and architectural support for monitors, vertical migration and user microprogrammingACM SIGARCH Computer Architecture News10.1145/964750.80184210:2(185-194)Online publication date: 1-Mar-1982
https://dl.acm.org/doi/10.1145/964750.801842
Maekawa MSakamura KIshikawa C(1982)Firmware structure and architectural support for monitors, vertical migration and user microprogrammingACM SIGPLAN Notices10.1145/960120.80184217:4(185-194)Online publication date: 1-Mar-1982
https://dl.acm.org/doi/10.1145/960120.801842
Wittie Lvan Tilborg ABurns WWard D(1982)An introduction to network computersProceedings of the ACM '82 conference10.1145/800174.809801(199-206)Online publication date: 1-Jan-1982
https://dl.acm.org/doi/10.1145/800174.809801
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Index Terms

Experimental Polyprocessor System (EPOS)—architecture
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures
  2. Dependable and fault-tolerant systems and networks
2. General and reference
  1. Cross-computing tools and techniques
    1. Reliability

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ISCA '79: Proceedings of the 6th annual symposium on Computer architecture

April 1979

246 pages

ISBN:9781450373975

DOI:10.1145/800090

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 23 April 1979

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Cited By

View all

Maekawa MSakamura KIshikawa C(1982)Firmware structure and architectural support for monitors, vertical migration and user microprogrammingACM SIGARCH Computer Architecture News10.1145/964750.80184210:2(185-194)Online publication date: 1-Mar-1982
https://dl.acm.org/doi/10.1145/964750.801842
Maekawa MSakamura KIshikawa C(1982)Firmware structure and architectural support for monitors, vertical migration and user microprogrammingACM SIGPLAN Notices10.1145/960120.80184217:4(185-194)Online publication date: 1-Mar-1982
https://dl.acm.org/doi/10.1145/960120.801842
Wittie Lvan Tilborg ABurns WWard D(1982)An introduction to network computersProceedings of the ACM '82 conference10.1145/800174.809801(199-206)Online publication date: 1-Jan-1982
https://dl.acm.org/doi/10.1145/800174.809801
Maekawa MSakamura KIshikawa CDitzel DDickman L(1982)Firmware structure and architectural support for monitors, vertical migration and user microprogrammingProceedings of the first international symposium on Architectural support for programming languages and operating systems10.1145/800050.801842(185-194)Online publication date: 1-Mar-1982
https://dl.acm.org/doi/10.1145/800050.801842
Lan J(1982)ARCHITECTURAL CONSIDERATIONS OF DISTRIBUTED COMPUTER CONTROL SYSTEMSDistributed Computer Control Systems 198110.1016/B978-0-08-028672-3.50014-6(41-48)Online publication date: 1982
https://doi.org/10.1016/B978-0-08-028672-3.50014-6
Maekawa MKain RFranta W(1981)Optimal processor interconnection topologiesProceedings of the 8th annual symposium on Computer Architecture10.5555/800052.801874(171-185)Online publication date: 12-May-1981
https://dl.acm.org/doi/10.5555/800052.801874
Wittie L(1981)Communication Structures for Large Networks of MicrocomputersIEEE Transactions on Computers10.1109/TC.1981.167577430:4(264-273)Online publication date: 1-Apr-1981
https://dl.acm.org/doi/10.1109/TC.1981.1675774
Yamamoto M(1981)A Survey of High-Level Language Machines in JapanComputer10.1109/C-M.1981.22053214:7(68-78)Online publication date: 1-Jul-1981
https://dl.acm.org/doi/10.1109/C-M.1981.220532
Tartar JBradshaw CSherman G(1980)Multiprocessor hardwareProceedings of the ACM 1980 annual conference10.1145/800176.810010(518-526)Online publication date: 1-Jan-1980
https://dl.acm.org/doi/10.1145/800176.810010
Tokoro MTamaru KMizuno MHori MLenfant JBorgerson BAtkins DIrani KKinniment DAiso H(1980)A high level multi-lingual multiprocessor KMP/IIProceedings of the 7th annual symposium on Computer Architecture10.1145/800053.801941(325-333)Online publication date: 6-May-1980
https://dl.acm.org/doi/10.1145/800053.801941
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