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Article

Improving Java performance using hardware translation

Authors:

Ramesh Radhakrishnan,

Lizy K. JohnAuthors Info & Claims

ICS '01: Proceedings of the 15th international conference on Supercomputing

Pages 427 - 439

https://doi.org/10.1145/377792.377901

Published: 17 June 2001 Publication History

Abstract

State of the art Java Virtual Machines with Just-In-Time (JIT) compilers make use of advanced compiler techniques, run-time profiling and adaptive compilation to improve performance. However, these techniques for alleviating performance bottlenecks are more effective in long running workloads, such as server applications. Short running Java programs, or client workloads, spend a large fraction of their execution time in compilation instead of useful execution when run using JIT compilers. In short running Java programs, the benefits of runtime translation do not compensate for the overhead.

We propose using hardware support to perform efficient Java translation coupled with a light weight run time environment. The additional hardware performs the translation of Java bytecodes to native code, thus eliminating much of the overhead of software translation. A translate d code buffer is used to hold the translated code, enabling reuse at the byte code level. The proposed hardware can be used in any general purpose processor without degrading performance of native code. The proposed technique is extremely effective for short running client workloads. A performance improvement of 2.8 times to 7.7 times over a software interpreter is achieved. When compared to a JIT compiler all SPECjvm98 benchmarks except one show a performance improvement ranging from. 2.7 times to 5.0 times. A performance degradation (0.58 times) is observed for one benchmark which is long running. Allowing hardware translation to perform optimizations similar to JIT compilers and Java processors will execute long running programs more efficiently and provide speedups similar to that of client workloads.

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Cited By

Park HKim SPark JMoon S(2018)Reusing the Optimized Code for JavaScript Ahead-of-Time CompilationACM Transactions on Architecture and Code Optimization10.1145/329105615:4(1-20)Online publication date: 19-Dec-2018
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Index Terms

Improving Java performance using hardware translation
1. Software and its engineering

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Published In

cover image ACM Conferences

ICS '01: Proceedings of the 15th international conference on Supercomputing

June 2001

510 pages

ISBN:158113410X

DOI:10.1145/377792

Chairmen:
Mario Mango Furnari
Istituto di Cibernetica, CNR, Italy
,
Efstratios Gallopoulos
Univ. of Patras

Copyright © 2001 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 17 June 2001

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ICS '01 Paper Acceptance Rate 45 of 133 submissions, 34%;

Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Park HKim SPark JMoon S(2018)Reusing the Optimized Code for JavaScript Ahead-of-Time CompilationACM Transactions on Architecture and Code Optimization10.1145/329105615:4(1-20)Online publication date: 19-Dec-2018
https://dl.acm.org/doi/10.1145/3291056
Tsai CKuo HLin ZGuo ZWang J(2015)A Java Processor IP Design for Embedded SoCACM Transactions on Embedded Computing Systems10.1145/262964914:2(1-25)Online publication date: 17-Feb-2015
https://dl.acm.org/doi/10.1145/2629649
Jayasena SFernando MRusira TPerera CPhilips C(2015)Auto-Tuning the Java Virtual MachineProceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop10.1109/IPDPSW.2015.84(1261-1270)Online publication date: 25-May-2015
https://dl.acm.org/doi/10.1109/IPDPSW.2015.84
Lin ZKuo HGuo ZTsai C(2012)Stack memory design for a low-cost instruction folding Java processor2012 IEEE International Symposium on Circuits and Systems10.1109/ISCAS.2012.6272011(3226-3229)Online publication date: May-2012
https://doi.org/10.1109/ISCAS.2012.6272011
Guan HLiu BQi ZYang YYang HLiang A(2010)CoDBTJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2010.07.00856:10(500-508)Online publication date: 1-Oct-2010
https://dl.acm.org/doi/10.1016/j.sysarc.2010.07.008
Ascott RSwartzlander E(2009)JavaFlow — A Java dataflow machine2009 IEEE International SOC Conference (SOCC)10.1109/SOCCON.2009.5398055(211-214)Online publication date: Sep-2009
https://doi.org/10.1109/SOCCON.2009.5398055
Oi H(2008)Local variable access behavior of a hardware-translation based Java virtual machineJournal of Systems and Software10.1016/j.jss.2008.03.05781:11(2059-2068)Online publication date: 1-Nov-2008
https://dl.acm.org/doi/10.1016/j.jss.2008.03.057
Yiyu TWan Yiu LChi Hang YLi RFong A(2006)A Java processor with hardware-support object-oriented instructionsMicroprocessors and Microsystems10.1016/j.micpro.2005.12.00730:8(469-479)Online publication date: Dec-2006
https://doi.org/10.1016/j.micpro.2005.12.007
Vertanen O(2006)Java type confusion and fault attacksProceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography10.1007/11889700_21(237-251)Online publication date: 10-Oct-2006
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Oi H(2005)On the design of the local variable cache in a hardware translation-based java virtual machineACM SIGPLAN Notices10.1145/1070891.106592340:7(87-94)Online publication date: 15-Jun-2005
https://dl.acm.org/doi/10.1145/1070891.1065923
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