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Article

ParallAX: an architecture for real-time physics

Authors:

Petros Faloutsos,

Sanjay J. Patel,

Glenn ReinmanAuthors Info & Claims

ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture

Pages 232 - 243

https://doi.org/10.1145/1250662.1250691

Published: 09 June 2007 Publication History

Abstract

Future interactive entertainment applications will featurethe physical simulation of thousands of interacting objectsusing explosions, breakable objects, and cloth effects. Whilethese applications require a tremendous amount of performanceto satisfy the minimum frame rate of 30 FPS, there is a dramatic amount of parallelism in future physics workloads.How will future physics architectures leverage parallelismto achieve the real-time constraint?.

We propose and characterize a set of forward-looking benchmarksto represent future physics load and explore the designspace of future physics processors. In response to thedemand of this workload, we demonstrate an architecturewith a set of powerful cores and caches to provide performancefor the serial and coarse-grain parallel components ofphysics simulation, along with a exible set of simple coresto exploit fine-grain parallelism. Our architecture combinesintelligent, application-aware L2 management with dynamiccoupling/allocation of simple cores to complex cores. Furthermore,we perform sensitivity analysis on interconnectalternatives to determine how tightly to couple these cores.

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Cited By

Kumar RCano JBrankovicy APavlouz DStavrouz KGibertx EMartinez AGonzalez A(2017)HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2017.7975290(185-194)Online publication date: Apr-2017
https://doi.org/10.1109/ISPASS.2017.7975290
Kumar RMartínez AGonzález A(2016)Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned EnvironmentACM Transactions on Computer Systems10.1145/280769433:4(1-33)Online publication date: 4-Jan-2016
https://dl.acm.org/doi/10.1145/2807694
Cano JKumar RBrankovic APavlou DStavrouz KGibert EMartınez AGonzalez A(2016)Quantitative characterization of the software layer of a HW/SW co-designed processor2016 IEEE International Symposium on Workload Characterization (IISWC)10.1109/IISWC.2016.7581274(1-10)Online publication date: Sep-2016
https://doi.org/10.1109/IISWC.2016.7581274
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Index Terms

ParallAX: an architecture for real-time physics
1. Computer systems organization

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Information & Contributors

Information

Published In

cover image ACM Conferences

ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture

June 2007

542 pages

ISBN:9781595937063

DOI:10.1145/1250662

General Chair:
Dean Tullsen
University of California, San Diego
,
Program Chair:
Brad Calder
Microsoft & University of California, San Diego

ACM SIGARCH Computer Architecture News Volume 35, Issue 2
May 2007
527 pages
ISSN:0163-5964
DOI:10.1145/1273440
Issue’s Table of Contents

Copyright © 2007 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGARCH: ACM Special Interest Group on Computer Architecture
IEEE-CS: Computer Society

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 09 June 2007

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SPAA07

Sponsor:

SIGARCH
IEEE-CS

SPAA07: 19th ACM Symposium on Parallelism in Algorithms and Architectures

June 9 - 13, 2007

California, San Diego, USA

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Overall Acceptance Rate 543 of 3,203 submissions, 17%

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June 21 - 25, 2025

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Cited By

Kumar RCano JBrankovicy APavlouz DStavrouz KGibertx EMartinez AGonzalez A(2017)HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2017.7975290(185-194)Online publication date: Apr-2017
https://doi.org/10.1109/ISPASS.2017.7975290
Kumar RMartínez AGonzález A(2016)Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned EnvironmentACM Transactions on Computer Systems10.1145/280769433:4(1-33)Online publication date: 4-Jan-2016
https://dl.acm.org/doi/10.1145/2807694
Cano JKumar RBrankovic APavlou DStavrouz KGibert EMartınez AGonzalez A(2016)Quantitative characterization of the software layer of a HW/SW co-designed processor2016 IEEE International Symposium on Workload Characterization (IISWC)10.1109/IISWC.2016.7581274(1-10)Online publication date: Sep-2016
https://doi.org/10.1109/IISWC.2016.7581274
Kumar RMartínez AGonzález A(2014)Efficient Power Gating of SIMD Accelerators Through Dynamic Selective Devectorization in an HW/SW Codesigned EnvironmentACM Transactions on Architecture and Code Optimization10.1145/262968111:3(1-23)Online publication date: 31-Jul-2014
https://dl.acm.org/doi/10.1145/2629681
Branković AStavrou KGibert EGonzález AFranke HHeinecke APalem KUpfal E(2013)Performance analysis and predictability of the software layer in dynamic binary translators/optimizersProceedings of the ACM International Conference on Computing Frontiers10.1145/2482767.2482786(1-10)Online publication date: 14-May-2013
https://dl.acm.org/doi/10.1145/2482767.2482786
Kumar RMartínez AGonzález A(2013)Dynamic Selective Devectorization for Efficient Power Gating of SIMD Units in a HW/SW Co-Designed EnvironmentProceedings of the 2013 25th International Symposium on Computer Architecture and High Performance Computing10.1109/SBAC-PAD.2013.10(81-88)Online publication date: 23-Oct-2013
https://dl.acm.org/doi/10.1109/SBAC-PAD.2013.10
Kumar RMartinez AGonzalez A(2013)Speculative dynamic vectorization to assist static vectorization in a HW/SW co-designed environment20th Annual International Conference on High Performance Computing10.1109/HiPC.2013.6799102(79-88)Online publication date: Dec-2013
https://doi.org/10.1109/HiPC.2013.6799102
Kumar RMartinez AGonzalez A(2013)Vectorizing for Wider Vector Units in a HW/SW Co-designed Environment2013 IEEE 10th International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing10.1109/HPCC.and.EUC.2013.80(518-525)Online publication date: Nov-2013
https://doi.org/10.1109/HPCC.and.EUC.2013.80
Sethia ADasika GMudge TMahlke S(2012)A Customized Processor for Energy Efficient Scientific ComputingIEEE Transactions on Computers10.1109/TC.2012.14461:12(1711-1723)Online publication date: 1-Dec-2012
https://dl.acm.org/doi/10.1109/TC.2012.144
Rajagopala V(2012)Physics engine on reconfigurable processor — Low power optimized solution empowering next-generation graphics on embedded platformsProceedings of the 2012 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational & Serious Games (CGAMES)10.1109/CGames.2012.6314565(138-142)Online publication date: 30-Jul-2012
https://dl.acm.org/doi/10.1109/CGames.2012.6314565
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