Article

Thermal via placement in 3D ICs

Authors:

Brent Goplen,

Sachin SapatnekarAuthors Info & Claims

ISPD '05: Proceedings of the 2005 international symposium on Physical design

Pages 167 - 174

https://doi.org/10.1145/1055137.1055171

Published: 03 April 2005 Publication History

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Abstract

As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promising way of mitigating thermal issues by lowering the thermal resistance of the chip itself. However, thermal vias take up valuable routing space, and therefore, algorithms are needed to minimize their usage while placing them in areas where they would make the greatest impact. With the developing technology of three-dimensional integrated circuits (3D ICs), thermal problems are expected to be more prominent, and thermal vias can have a larger impact on them than in traditional 2D ICs. In this paper, thermal vias are assigned to specific areas of a 3D IC and used to adjust their effective thermal conductivities. The thermal via placement method makes iterative adjustments to these thermal conductivities in order to achieve a desired maximum temperature objective. Finite element analysis (FEA) is used in formulating the method and in calculating temperatures quickly during each iteration. As a result, the method efficiently achieves its thermal objective while minimizing the thermal via utilization.

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Wang XYang YChen DLi D(2023)A High-Efficiency Design Method of TSV Array for Thermal Management of 3-D Integrated SystemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321361042:6(1733-1741)Online publication date: Jun-2023
https://doi.org/10.1109/TCAD.2022.3213610
Son KKim SPark HKim SKim KPark SSim BJeong SPark GKim J(2020)A Novel Through Mold Plate (TMP) for Signal and Thermal Integrity Improvement of High Bandwidth Memory (HBM)2020 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO)10.1109/NEMO49486.2020.9343473(1-4)Online publication date: 7-Dec-2020
https://doi.org/10.1109/NEMO49486.2020.9343473
Ni TChang HZhu SLu LLi XXu QLiang HHuang Z(2019)Temperature-Aware Floorplanning for Fixed-Outline 3D ICsIEEE Access10.1109/ACCESS.2019.29428397(139787-139794)Online publication date: 2019
https://doi.org/10.1109/ACCESS.2019.2942839
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Index Terms

Thermal via placement in 3D ICs
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement
      2. Wire routing
  2. Emerging technologies

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Information & Contributors

Information

Published In

ISPD '05: Proceedings of the 2005 international symposium on Physical design

April 2005

258 pages

ISBN:1595930213

DOI:10.1145/1055137

General Chair:
Patrick Groeneveld
Eindhoven University
,
Program Chair:
Lou Scheffer
Cadence

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 April 2005

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ISPD05: International Symposium on Physical Design 2005

April 3 - 6, 2005

California, San Francisco, USA

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Overall Acceptance Rate 62 of 172 submissions, 36%

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Cited By

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Wang XYang YChen DLi D(2023)A High-Efficiency Design Method of TSV Array for Thermal Management of 3-D Integrated SystemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321361042:6(1733-1741)Online publication date: Jun-2023
https://doi.org/10.1109/TCAD.2022.3213610
Son KKim SPark HKim SKim KPark SSim BJeong SPark GKim J(2020)A Novel Through Mold Plate (TMP) for Signal and Thermal Integrity Improvement of High Bandwidth Memory (HBM)2020 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO)10.1109/NEMO49486.2020.9343473(1-4)Online publication date: 7-Dec-2020
https://doi.org/10.1109/NEMO49486.2020.9343473
Ni TChang HZhu SLu LLi XXu QLiang HHuang Z(2019)Temperature-Aware Floorplanning for Fixed-Outline 3D ICsIEEE Access10.1109/ACCESS.2019.29428397(139787-139794)Online publication date: 2019
https://doi.org/10.1109/ACCESS.2019.2942839
Alqahtani ARen ZLee JBagherzadeh N(2018)System-Level Analysis of 3D ICs with Thermal TSVsACM Journal on Emerging Technologies in Computing Systems10.1145/326473614:3(1-16)Online publication date: 23-Oct-2018
https://dl.acm.org/doi/10.1145/3264736
Hwang LKwon BWong M(2018)Accurate Models for Optimizing Tapered Microchannel Heat Sinks in 3D ICs2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2018.00021(58-63)Online publication date: Jul-2018
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Pi YWang NChen JMiao MJin YWang W(2018)Anisotropic equivalent thermal conductivity model for efficient and accurate full-chip-scale numerical simulation of 3D stacked ICInternational Journal of Heat and Mass Transfer10.1016/j.ijheatmasstransfer.2017.10.044120(361-378)Online publication date: May-2018
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El‐Atab NHussain MHussain M(2018) The Future of CMOS : More Moore or a New Disruptive Technology? Advanced Nanoelectronics10.1002/9783527811861.ch1(1-31)Online publication date: 5-Oct-2018
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Zou QKursun EXie Y(2017)Thermomechanical Stress-Aware Management for 3-D IC DesignsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.270711925:9(2678-2682)Online publication date: Sep-2017
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Li DJoshi SKim JOgrenci-Memik S(2017)End-to-End Analysis of Integration for Thermocouple-Based Sensors Into 3-D ICsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.269904025:9(2498-2511)Online publication date: Sep-2017
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