research-article

Dynamic fault dictionaries and two-stage fault isolation

Authors:

Paul G. Ryan,

W. Kent FuchsAuthors Info & Claims

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 6, Issue 1

Pages 176 - 180

https://doi.org/10.1109/92.661261

Published: 01 March 1998 Publication History

Abstract

This paper presents dynamic two-stage fault isolation for sequential random logic very large scale integrated (VLSI) circuits, and introduces limited and dynamic fault dictionaries. In the first stage of the dynamic process, a limited fault dictionary identifies candidate faults, which are further distinguished in the second stage by a dictionary generated dynamically for the candidate faults and a subset of the test vectors. This provides high resolution but avoids the costs of full static dictionaries. Two-stage fault isolation is evaluated for benchmark circuits and on defects in industrial circuits.

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Cited By

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Chun SKim SKim HKang S(2006)An Efficient Dictionary Organization for Maximum DiagnosisJournal of Electronic Testing: Theory and Applications10.1007/s10836-006-5854-x22:1(37-48)Online publication date: 1-Feb-2006
Wang LWu CWen X(2006)VLSI Test Principles and ArchitecturesundefinedOnline publication date: 14-Aug-2006
Liu CChakrabarty K(2005)Design and analysis of compact dictionaries for diagnosis in scan-BISTIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2005.85362413:8(979-984)Online publication date: 1-Aug-2005
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Dynamic fault dictionaries and two-stage fault isolation
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cover image IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 6, Issue 1

March 1998

179 pages

ISSN:1063-8210

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IEEE Educational Activities Department

United States

Publication History

Published: 01 March 1998

Revised: 15 September 1997

Received: 15 September 1995

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Chun SKim SKim HKang S(2006)An Efficient Dictionary Organization for Maximum DiagnosisJournal of Electronic Testing: Theory and Applications10.1007/s10836-006-5854-x22:1(37-48)Online publication date: 1-Feb-2006
Wang LWu CWen X(2006)VLSI Test Principles and ArchitecturesundefinedOnline publication date: 14-Aug-2006
Liu CChakrabarty K(2005)Design and analysis of compact dictionaries for diagnosis in scan-BISTIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2005.85362413:8(979-984)Online publication date: 1-Aug-2005
Bayraktaroglu IOrailoglu A(2005)The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault DiagnosisIEEE Transactions on Computers10.1109/TC.2005.1454:1(61-75)Online publication date: 1-Jan-2005
Liu CChakrabarty K(2004)Compact Dictionaries for Fault Diagnosis in Scan-BISTIEEE Transactions on Computers10.1109/TC.2004.453:6(775-780)Online publication date: 1-Jun-2004
Wu JGreenstein GRudnick E(1999)A fault list reduction approach for efficient bridge fault diagnosisProceedings of the conference on Design, automation and test in Europe10.1145/307418.307508(61-es)Online publication date: 1-Jan-1999

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On Fault Representativeness of Software Fault Injection

A Fault-Tolerant Systolic Sorter

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