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research-article

Exploring the Design Space of Self-Regulating Power-Aware On/Off Interconnection Networks

Authors:

Vassos Soteriou,

Li-Shiuan PehAuthors Info & Claims

IEEE Transactions on Parallel and Distributed Systems, Volume 18, Issue 3

Pages 393 - 408

https://doi.org/10.1109/TPDS.2007.43

Published: 01 March 2007 Publication History

Abstract

With power consumption becoming increasingly critical in interconnected systems, power-aware networks will become part-and-parcel of many single-chip and multichip systems. As communication links consume significant power regardless of utilization, a mechanism to realize such power-aware networks is on/off links—network links that can be turned on/off as a function of traffic. In this paper, we investigate and propose self-regulating power-aware interconnection networks that turn their links on/off in response to bursts and dips in traffic in a distributed fashion. We explore the design space of such on/off networks, outlining a 5-step design methodology along with various building block solutions at each step that can be effectively assembled to develop various on/off network designs. We applied our methodology to the design of two classes of on/off networks with links that possess substantially different on/off delays, an on-chip network as well as a chip-to-chip network, and show that our designs are able to adapt dynamically to variations in network traffic. Three specific network designs are then constructed, presented, and evaluated. Our simulations show that link power consumption can be reduced by up to 54.4 percent, with a modest increase in network latency.

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Cited By

Kim GChoi HKim J(2018)TCEPProceedings of the 45th Annual International Symposium on Computer Architecture10.1109/ISCA.2018.00065(712-725)Online publication date: 2-Jun-2018
https://dl.acm.org/doi/10.1109/ISCA.2018.00065
O’brien KPietri IReddy RLastovetsky ASakellariou R(2017)A Survey of Power and Energy Predictive Models in HPC Systems and ApplicationsACM Computing Surveys10.1145/307881150:3(1-38)Online publication date: 29-Jun-2017
https://dl.acm.org/doi/10.1145/3078811
Fujimoto RHunter MBiswas AJackson MNeal SCai WMeng TWilsey PJin K(2017)Power Efficient Distributed SimulationProceedings of the 2017 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation10.1145/3064911.3069397(77-88)Online publication date: 16-May-2017
https://dl.acm.org/doi/10.1145/3064911.3069397
Show More Cited By

Index Terms

Exploring the Design Space of Self-Regulating Power-Aware On/Off Interconnection Networks
1. General and reference
  1. Cross-computing tools and techniques
    1. Design
2. Networks

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cover image IEEE Transactions on Parallel and Distributed Systems

IEEE Transactions on Parallel and Distributed Systems Volume 18, Issue 3

March 2007

143 pages

ISSN:1045-9219

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Copyright © 2007.

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IEEE Press

Publication History

Published: 01 March 2007

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Cited By

Kim GChoi HKim J(2018)TCEPProceedings of the 45th Annual International Symposium on Computer Architecture10.1109/ISCA.2018.00065(712-725)Online publication date: 2-Jun-2018
https://dl.acm.org/doi/10.1109/ISCA.2018.00065
O’brien KPietri IReddy RLastovetsky ASakellariou R(2017)A Survey of Power and Energy Predictive Models in HPC Systems and ApplicationsACM Computing Surveys10.1145/307881150:3(1-38)Online publication date: 29-Jun-2017
https://dl.acm.org/doi/10.1145/3078811
Fujimoto RHunter MBiswas AJackson MNeal SCai WMeng TWilsey PJin K(2017)Power Efficient Distributed SimulationProceedings of the 2017 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation10.1145/3064911.3069397(77-88)Online publication date: 16-May-2017
https://dl.acm.org/doi/10.1145/3064911.3069397
Totoni EJain NKale L(2015)Power Management of Extreme-Scale Networks with On/Off Links in Runtime SystemsACM Transactions on Parallel Computing10.1145/26870011:2(1-21)Online publication date: 18-Feb-2015
https://dl.acm.org/doi/10.1145/2687001
Modarressi MTeimouri NSarbazi-azad H(2015)Improving the performance of packet-switched networks-on-chip by SDM-based adaptive shortcut pathsIntegration, the VLSI Journal10.1016/j.vlsi.2014.10.00350:C(193-204)Online publication date: 1-Jun-2015
https://dl.acm.org/doi/10.1016/j.vlsi.2014.10.003
Abousamra AJones AMelhem R(2013)Ordering circuit establishment in multiplane NoCsACM Transactions on Design Automation of Electronic Systems10.1145/250075218:4(1-33)Online publication date: 25-Oct-2013
https://dl.acm.org/doi/10.1145/2500752
Isoaho JPlosila JGuang LNigussie ETenhunen H(2012)Survey of Self-Adaptive NoCs with Energy-Efficiency and DependabilityInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20120401013:2(1-22)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.4018/jertcs.2012040101
Savva ATheocharides TSoteriou V(2012)Intelligent on/off dynamic link management for on-chip networksJournal of Electrical and Computer Engineering10.1155/2012/1078212012(6-6)Online publication date: 1-Jan-2012
https://dl.acm.org/doi/10.1155/2012/107821
Zhang HMatsutani HTake YKuroda TAmano H(2012)Vertical link on/off control methods for wireless 3-d nocsProceedings of the 25th international conference on Architecture of Computing Systems10.1007/978-3-642-28293-5_18(212-224)Online publication date: 28-Feb-2012
https://dl.acm.org/doi/10.1007/978-3-642-28293-5_18
Isoaho JPlosila JTenhunen HGuang L(2010)Hierarchical Agent Monitored Parallel On-Chip SystemInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20100401051:2(86-105)Online publication date: 1-Apr-2010
https://dl.acm.org/doi/10.4018/jertcs.2010040105
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