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research-article

Multiple Fault Diagnosis in Combinational Circuits Based on an Effect-Cause Analysis

Published: 01 June 1980 Publication History

Abstract

In this paper we present a new approach to multiple fault diagnosis in combinational circuits based on an effect-cause analysis. The main vehicle of our approach is the deduction of internal line values in a circuit under test N*. The knowledge of these values allows us to identify fault situations in N* (causes) which are compatible with the applied test and the obtained response (the effect). A fault situation specifies faulty as well as fault-free lines. Other applications include identifying the existence of nonstuck faults in N* and determination of faults not detected by a given test, including redundant faults. The latter application allows for the generation of tests for multiple faults without performing fault enumeration.

References

[1]
M. Abramovici, "'Fault diagnosis in logic circuits based on effect-cause analysis," Ph.D. thesis, Univ. of Southern California, June 1980.
[2]
M. A. Breuer, S. J. Chang, and S. Y. H. Su., "Identification of multiple stuck-type faults in combinational networks," IEEE Trans. Comput.. vol. C-25, pp. 44-54, Jan. 1976.
[3]
C. W. Cha, "Multiple fault diagnosis in combinational networks," Univ. of Illinois, Coordinated Sci. Lab., Rep. R-650, June 1974.
[4]
F. J. O. Dias, "Fault masking in combinational logic circuits," IEEE Trans. Comput., vol. C-24, pp. 476-482, May 1975.
[5]
M. Fridrich and W. A. Davis, "Minimal fault tests for combinational networks," IEEE Trans. Comput., vol. C-23, pp. 850-859, Aug. 1974.
[6]
A. D. Friedman, "Fault detection in redundant circuits," IEEE Trans. Comput., vol. EC-16, pp. 99-100, Feb. 1967.
[7]
E. Horowitz and S. Sahni, Fundamentals of Computer Algorithms. Potomac, MD: Computer Science Press, 1978, ch. 7.-
[8]
J. P. Roth, "Diagnosis of automata failures: A calculus and a method," IBM J. Res. Develop., vol. 10, pp. 278-291, July 1966.
[9]
J. E. Smith, "On the existence of combinational logic circ:uits exhibiting multiple redundancy," IEEE Trans. Comput., vol. C-27, pp. 1221-1225, Dec. 1978.
[10]
J. E. Smith, "On necessary and sufficient conditions for multiple fault undetectability," IEEE Trans. Comput., vol. C-28, pp. 801-802, Oct. 1979.

Cited By

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  • (2011)Diagnosis of transition fault clustersProceedings of the 48th Design Automation Conference10.1145/2024724.2024824(429-434)Online publication date: 5-Jun-2011
  • (2010)Selection of a fault model for fault diagnosis based on unique responsesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.202550318:11(1533-1543)Online publication date: 1-Nov-2010
  • (2010)Diagnosis of integrated circuits with multiple defects of arbitrary characteristicsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2010.204835229:6(977-987)Online publication date: 1-Jun-2010
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  1. Multiple Fault Diagnosis in Combinational Circuits Based on an Effect-Cause Analysis

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      Information

      Published In

      cover image IEEE Transactions on Computers
      IEEE Transactions on Computers  Volume 29, Issue 6
      June 1980
      142 pages

      Publisher

      IEEE Computer Society

      United States

      Publication History

      Published: 01 June 1980

      Author Tags

      1. Combinational networks
      2. deduction of internal values
      3. effect-cause analysis
      4. fault diagnosis
      5. multiple redundant faults
      6. multiple stuck-at faults

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      View all
      • (2011)Diagnosis of transition fault clustersProceedings of the 48th Design Automation Conference10.1145/2024724.2024824(429-434)Online publication date: 5-Jun-2011
      • (2010)Selection of a fault model for fault diagnosis based on unique responsesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.202550318:11(1533-1543)Online publication date: 1-Nov-2010
      • (2010)Diagnosis of integrated circuits with multiple defects of arbitrary characteristicsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2010.204835229:6(977-987)Online publication date: 1-Jun-2010
      • (2009)Selection of a fault model for fault diagnosis based on unique responsesProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874862(994-999)Online publication date: 20-Apr-2009
      • (2008)A Method of Locating Open Faults on Incompletely Identified Pass/Fail InformationIEICE - Transactions on Information and Systems10.1093/ietisy/e91-d.3.661E91-D:3(661-666)Online publication date: 1-Mar-2008
      • (2004)On per-test fault diagnosis using the X-fault modelProceedings of the 2004 IEEE/ACM International conference on Computer-aided design10.1109/ICCAD.2004.1382653(633-640)Online publication date: 7-Nov-2004
      • (2001)Making Cause-Effect Cost EffectiveProceedings of the 2001 IEEE International Test Conference10.5555/839296.843736Online publication date: 30-Oct-2001
      • (2000)Path-Delay Fault Diagnosis in Non-Scan Sequential Circuits with At-Speed Test ApplicationProceedings of the 2000 IEEE International Test Conference10.5555/839295.843642Online publication date: 3-Oct-2000
      • (2000)An Improved Fault Diagnosis Algorithm Based on Path Tracing with Dynamic Circuit ExtractionProceedings of the 2000 IEEE International Test Conference10.5555/839295.843641Online publication date: 3-Oct-2000
      • (1999)A New Method for Diagnosing Multiple Stuck-at Faults using Multiple and Single Fault SimulationsProceedings of the 1999 17TH IEEE VLSI Test Symposium10.5555/832299.836519Online publication date: 26-Apr-1999
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