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10.1109/ISQED.2009.4810290guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
Article

Yield evaluation of analog placement with arbitrary capacitor ratio

Published: 16 March 2009 Publication History

Abstract

Capacitance mismatch can be generally attributed two sources of errors: random mismatch and systematic mismatch. Random mismatch is caused by the process variation, while systematic mismatch is mainly due to asymmetrical layout and processing gradients. Common centroid structure may reduce the systematic mismatch, but not the random mismatch. Based on spatial correlation model, this study derives the relationship among correlation, mismatch, and variation of capacitance ratio. Results show that the placement of unit capacitance array with higher correlation results in lower mismatch and lower variation of capacitance ratio. For any arbitrary capacitance ratio, i.e., more than two capacitors, if the summation of correlation coefficients for all capacitance pairs is defined as "index", the placement with higher index results in higher yield, where the yield is defined as the ratio of the acceptable designs over the sample size. In other words, one can find a near-optimal placement which has better yield by using the simple calculation of index, instead of the complicated circuit simulations.

Cited By

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  • (2013)Optimal common-centroid-based unit capacitor placements for yield enhancement of switched-capacitor circuitsACM Transactions on Design Automation of Electronic Systems10.1145/253439419:1(1-13)Online publication date: 20-Dec-2013
  • (2012)Analytical-based approach for capacitor placement with gradient error compensation and device correlation enhancement in analog integrated circuitsProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429520(635-642)Online publication date: 5-Nov-2012
  • (2011)Common-centroid capacitor placement considering systematic and random mismatches in analog integrated circuitsProceedings of the 48th Design Automation Conference10.1145/2024724.2024847(528-533)Online publication date: 5-Jun-2011

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Published In

cover image Guide Proceedings
ISQED '09: Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
March 2009
844 pages
ISBN:9781424429523

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IEEE Computer Society

United States

Publication History

Published: 16 March 2009

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Cited By

View all
  • (2013)Optimal common-centroid-based unit capacitor placements for yield enhancement of switched-capacitor circuitsACM Transactions on Design Automation of Electronic Systems10.1145/253439419:1(1-13)Online publication date: 20-Dec-2013
  • (2012)Analytical-based approach for capacitor placement with gradient error compensation and device correlation enhancement in analog integrated circuitsProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429520(635-642)Online publication date: 5-Nov-2012
  • (2011)Common-centroid capacitor placement considering systematic and random mismatches in analog integrated circuitsProceedings of the 48th Design Automation Conference10.1145/2024724.2024847(528-533)Online publication date: 5-Jun-2011

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