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Designing Next-Generation Massively Multithreaded Architectures for Irregular Applications

Published: 01 August 2012 Publication History

Abstract

Massively multithreaded architectures like the Cray XMT address the needs of irregular data-intensive applications better than commodity clusters. A proposed evolution of the XMT integrates multicore processors and next-generation interconnects, along with memory reference aggregation to optimize network utilization. The featured Web extra is a video interview with Center for Adaptive Supercomputing Software-Multithreaded Architectures (CASS-MT) Project Director John Feo, who discusses irregular applications and research on massively multithreaded architectures. YouTube URL: http://youtu.be/QxAgOGbp8qA

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  • (2019)Accelerating In-Memory Database Selections Using Latency Masking Hardware ThreadsACM Transactions on Architecture and Code Optimization10.1145/331022916:2(1-28)Online publication date: 9-Apr-2019
  • (2016)A parallel min-cut algorithm using iteratively reweighted least squares targeting at problems with floating-point edge weightsParallel Computing10.1016/j.parco.2016.02.00359:C(43-59)Online publication date: 1-Nov-2016

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Published In

cover image Computer
Computer  Volume 45, Issue 8
August 2012
75 pages

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 August 2012

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View all
  • (2019)Accelerating In-Memory Database Selections Using Latency Masking Hardware ThreadsACM Transactions on Architecture and Code Optimization10.1145/331022916:2(1-28)Online publication date: 9-Apr-2019
  • (2016)A parallel min-cut algorithm using iteratively reweighted least squares targeting at problems with floating-point edge weightsParallel Computing10.1016/j.parco.2016.02.00359:C(43-59)Online publication date: 1-Nov-2016

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