Reconfigurable machine and its application to logic diagnosis
Authors: 
Naoaki Suganuma, Yukihiro Murata, Satoru Nakata, Shinichi Nagata, Masahiro Tomita, Kotaro HiranoAuthors Info & Claims
Pages 373 - 376
References
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T. Blank, "A Survey of Hardware Accelerators Used in Computer-A/ded Design," IEEE Design and Test of Computers, vol.1, no.3. pp.21-39, 1984.
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M. Sato, K. Kubota, and T. Obtsuki, "A Hardware Implementation of Gddless Routing Based on Content Addressable Memory," Proc. 27th ACM/IEEE Design Automation Conference, pp.646-649, 1990.
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IL Subramanian and M. R. Zargham, "Distributed and Parallel Demand Driven Logic Simulation," Pro<:. 27th ACM/IEEE Design Automation Conference, pp.485-490, 1990.
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IC Y. Tham, "Parallel,Processing for CAD Applications," IEEE Design and Test of Computers, voL4, no.5. pp.13-17, 1987.
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"Programmable, Gate Array User's Guide," Xilinx Inc., 1989.
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R. Murgai, Y, Nish/zaki, N. Shenoy, R. K. Brayton, and A. Sangiovanni- Vhx;entelli, "Logic Synthesis for Programmable Gate Arrays," Proc. 27th ACM/ IEEE Design Automation Conference, pp.620-625, 1990.
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M. Tomita, H. Jiang, T. Yamamoto, Y. Hayashi "An Algorithm for Locating Logic Design Errors,*' ICCAD-90, pp.468- 471, 1990.
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- SIGDA: ACM Special Interest Group on Design Automation
- IEEE-CAS: Circuits & Systems
- IEEE-CS: Computer Society
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IEEE Computer Society Press
Washington, DC, United States
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Published: 08 November 1992
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