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research-article

Fast statistical timing analysis of latch-controlled circuits for arbitrary clock periods

Authors:

Ulf SchlichtmannAuthors Info & Claims

ICCAD '10: Proceedings of the International Conference on Computer-Aided Design

Pages 524 - 531

Published: 07 November 2010 Publication History

Abstract

Latch-controlled circuits have a remarkable advantage in timing performance as process variations become more relevant for circuit design. Existing methods of statistical timing analysis for such circuits, however, still need improvement in runtime and their results should be extended to provide yield information for any given clock period. In this paper, we propose a method combining a simplified iteration and a graph transformation algorithm. The result of this method is in a parametric form so that the yield for any given clock period can easily be evaluated. The graph transformation algorithm handles the constraints from nonpositive loops effectively, completely avoiding the heuristics used in other existing methods. Therefore the accuracy of the timing analysis is well maintained. Additionally, the proposed method is much faster than other existing methods. Especially for large circuits it offers about 100 times performance improvement in timing verification.

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Cited By

Li BChen NSchlichtmann UPhillips JHu AGraeb H(2011)Fast statistical timing analysis for circuits with post-silicon tunable clock buffersProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132354(111-117)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132354

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Information & Contributors

Information

Published In

cover image ACM Conferences

ICCAD '10: Proceedings of the International Conference on Computer-Aided Design

November 2010

863 pages

ISBN:9781424481927

General Chair:
Louis Scheffer
Howard Hughes Medical Institute, Ashburn, VA
,
Program Chairs:
Joel Phillips
Cadence Research Labs, Berkeley, CA
,
Alan J. Hu
Univ. of British Columbia, Vancouver, BC V6T 1Z4 Canada

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE CEDA

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IEEE Press

Publication History

Published: 07 November 2010

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Research-article

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ICCAD '10

Sponsor:

SIGDA

ICCAD '10: The International Conference on Computer-Aided Design

November 7 - 11, 2010

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

Li BChen NSchlichtmann UPhillips JHu AGraeb H(2011)Fast statistical timing analysis for circuits with post-silicon tunable clock buffersProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132354(111-117)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132354

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