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Functional verification of a multiple-issue, pipelined, superscalar Alpha processor—the Alpha 21164 CPU chip

Authors:

Michael Kantrowitz,

Lisa M. NoackAuthors Info & Claims

Digital Technical Journal, Volume 7, Issue 1

Pages 136 - 144

Published: 02 January 1995 Publication History

Abstract

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Gribkov IZakharov AKoltsov PKotovich NKravchenko AKoutsaev AOsipov AKhisambeev I(2007)INTEGProceedings of the 11th Conference on Proceedings of the 11th WSEAS International Conference on Circuits - Volume 1110.5555/1348610.1348622(55-59)Online publication date: 23-Jul-2007
https://dl.acm.org/doi/10.5555/1348610.1348622
Lee RTsien BRabaey J(2001)Pre-silicon verification of the Alpha 21364 microprocessor error handling systemProceedings of the 38th annual Design Automation Conference10.1145/378239.379073(822-827)Online publication date: 22-Jun-2001
https://dl.acm.org/doi/10.1145/378239.379073
Rotithor H(2000)Postsilicon Validation Methodology for MicroprocessorsIEEE Design & Test10.1109/54.89500817:4(77-88)Online publication date: 1-Oct-2000
https://dl.acm.org/doi/10.1109/54.895008
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Index Terms

Functional verification of a multiple-issue, pipelined, superscalar Alpha processor—the Alpha 21164 CPU chip
1. Applied computing
  1. Computers in other domains
    1. Personal computers and PC applications
      1. Microcomputers
2. Hardware
  1. Hardware validation
    1. Functional verification

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Superscalar Instruction Execution in the 21164 Alpha Microprocessor

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Internal architecture of Alpha 21164 microprocessor
COMPCON '95: Proceedings of the 40th IEEE Computer Society International Conference

The internal architecture of a 1200 MIPS/600 MFLOPS (peak) high-performance CMOS ALPHA microprocessor chip is described. This second-generation implementation is the world's fastest microprocessor. It contains a quad-issue superscalar instruction unit, ...
The Alpha 21264 Microprocessor

The third generation Alpha microprocessor from Compaq Computer Corporation (formerly Digital Equipment) is the 21264. This microprocessor can execute 2.0-2.4 billion instructions per second with a 500-600 MHz cycle time in a 0.35 um CMOS process, ...

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Published In

Digital Technical Journal Volume 7, Issue 1

Special 10th anniversary issue

Jan. 1995

138 pages

ISSN:0898-901X

Issue’s Table of Contents

Publisher

Digital Equipment Corp.

United States

Publication History

Published: 02 January 1995

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Gribkov IZakharov AKoltsov PKotovich NKravchenko AKoutsaev AOsipov AKhisambeev I(2007)INTEGProceedings of the 11th Conference on Proceedings of the 11th WSEAS International Conference on Circuits - Volume 1110.5555/1348610.1348622(55-59)Online publication date: 23-Jul-2007
https://dl.acm.org/doi/10.5555/1348610.1348622
Lee RTsien BRabaey J(2001)Pre-silicon verification of the Alpha 21364 microprocessor error handling systemProceedings of the 38th annual Design Automation Conference10.1145/378239.379073(822-827)Online publication date: 22-Jun-2001
https://dl.acm.org/doi/10.1145/378239.379073
Rotithor H(2000)Postsilicon Validation Methodology for MicroprocessorsIEEE Design & Test10.1109/54.89500817:4(77-88)Online publication date: 1-Oct-2000
https://dl.acm.org/doi/10.1109/54.895008
Bose P(2000)Testing for Function and PerformanceJournal of Electronic Testing: Theory and Applications10.1023/A:100836392104516:1-2(29-48)Online publication date: 1-Feb-2000
https://dl.acm.org/doi/10.1023/A%3A1008363921045
Reed CThygesen D(1999)Pseudorandom verification and emulation of an MPEG-2 transport demultiplexorIBM Journal of Research and Development10.1147/rd.434.053343:4(533-544)Online publication date: 1-Jul-1999
https://dl.acm.org/doi/10.1147/rd.434.0533
Bose PConte TAustin T(1999)Guest Editors' IntroductionIEEE Micro10.1109/MM.1999.76849519:3(9-14)Online publication date: 1-May-1999
https://dl.acm.org/doi/10.1109/MM.1999.768495
Hangal SO'Connor M(1999)Performance Analysis and Validation of the picoJava ProcessorIEEE Micro10.1109/40.76850519:3(66-72)Online publication date: 1-May-1999
https://dl.acm.org/doi/10.1109/40.768505
Taylor SQuinn MBrown DDohm NHildebrandt SHuggins JRamey CChawla BBryant RRabaey J(1998)Functional verification of a multiple-issue, out-of-order, superscalar Alpha processor—the DEC Alpha 21264 microprocessorProceedings of the 35th annual Design Automation Conference10.1145/277044.277208(638-643)Online publication date: 1-May-1998
https://dl.acm.org/doi/10.1145/277044.277208
Stolicny CDavies RMcKernan PTruong T(1998)Alpha 21164 Manufacturing Test Development and Coverage AnalysisIEEE Design & Test10.1109/54.70604015:3(98-104)Online publication date: 1-Jul-1998
https://dl.acm.org/doi/10.1109/54.706040
Stolicny CDavies RMcKernan PTruong T(1997)MANUFACTURING PATTERN DEVELOPMENT FOR THE ALPHA 21164 MICROPROCESSORProceedings of the 1997 IEEE International Test Conference10.5555/844384.845814Online publication date: 1-Nov-1997
https://dl.acm.org/doi/10.5555/844384.845814
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Superscalar Instruction Execution in the 21164 Alpha Microprocessor

Internal architecture of Alpha 21164 microprocessor

The Alpha 21264 Microprocessor

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