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Synthesis for real time systems: Solutions and challenges

Authors:

Ingrid Verbauwhede,

Jan M. RabaeyAuthors Info & Claims

Journal of VLSI Signal Processing Systems, Volume 9, Issue 1-2

Pages 67 - 88

Published: 11 January 1995 Publication History

Abstract

A real time system typically combines a variety of implementation technologies and hardware architectures. Deciding how to partition the system and selecting an architectural technology for the sub-systems is by no means a trivial task. These architectural decisions, which can have a major impact on the quality and performance of the final implementation, have to be made at the early stages in the design process, when the impact of the decisions is unclear and can only be quantified using some primitive measures. p ]In this paper, we present our vision on how a next generation of design environment can aid the designer in this decision process. We first identify the problems of designing a heterogeneous real time system by walking through the design process of a complex speech recognition system. Based on this analysis, we propose a system design methodology build on top of current synthesis tools. Today, DSP synthesis tools are application and/or architecture specific, covering subparts of the application once the partitioning is made. To make them useful in the proposed methodology, a unified view on the underlying architecture assumptions is needed. Secondly, good decision making requires an "as-good-as-possible" estimation of the implications of the decision. Therefore, it is important that current manual estimation be enlarged by high level estimation and performance analysis tools. p ]The HYPERSPACE environment, which is currently under development, therefore, consists of three complementary components: a set of architecture specific compilers, a set of estimation and performance analysis tools and an architecture selection and partitioning framework, steered by the designer.

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Cited By

Verbauwhede ISchaumont PPiguet CKienhuis B(2004)Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia ProcessingProceedings of the conference on Design, automation and test in Europe - Volume 210.5555/968879.969219Online publication date: 16-Feb-2004
https://dl.acm.org/doi/10.5555/968879.969219
Verbauwhede IScheers CRabaey JLorenzetti M(1994)Memory estimation for high level synthesisProceedings of the 31st annual Design Automation Conference10.1145/196244.196313(143-148)Online publication date: 6-Jun-1994
https://dl.acm.org/doi/10.1145/196244.196313

Index Terms

Synthesis for real time systems: Solutions and challenges

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Information & Contributors

Information

Published In

cover image Journal of VLSI Signal Processing Systems

Journal of VLSI Signal Processing Systems Volume 9, Issue 1-2

Special issue on design environments for DSP

Jan. 1995

135 pages

ISSN:0922-5773

Editors:
Ingrid Verbauwhede
Univ. of California at Berkeley, Berkeley
,
Jan Rabaey
Univ. of California at Berkeley, Berkeley
,
Earl E. Swartzlander
Univ. of Texas at Austin, Austin
,
S. Y. Kung
Princeton Univ., Princeton, NJ

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Copyright © Copyright © 1995 Kluwer Academic Publishers.

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Kluwer Academic Publishers

United States

Publication History

Published: 11 January 1995

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Cited By

Verbauwhede ISchaumont PPiguet CKienhuis B(2004)Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia ProcessingProceedings of the conference on Design, automation and test in Europe - Volume 210.5555/968879.969219Online publication date: 16-Feb-2004
https://dl.acm.org/doi/10.5555/968879.969219
Verbauwhede IScheers CRabaey JLorenzetti M(1994)Memory estimation for high level synthesisProceedings of the 31st annual Design Automation Conference10.1145/196244.196313(143-148)Online publication date: 6-Jun-1994
https://dl.acm.org/doi/10.1145/196244.196313

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