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Application specific NoC design

Author:

Luca BeniniAuthors Info & Claims

DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings

Pages 491 - 495

Published: 06 March 2006 Publication History

Abstract

Scalable Networks on Chips (NoCs) are needed to match the ever-increasing communication demands of large-scale Multi-Processor Systems-on-chip (MPSoCs) for high-end wireless communications applications. The heterogeneous nature of on-chip cores, and the energy efficiency requirements typical of wireless communications call for application-specific NoCs which eliminate much of the overheads connected with general-purpose communication architectures. However, application-specific NoCs must be supported by adequate design flows to reduce design time and effort.In this paper we survey the main challenges in application-specific NoC design, and we outline a complete NoC design flow and methodology. A case study on a high complexity SoC demonstrates that it is indeed possible to generate an application-specific NoC from a high level specification in a few hours. Comparison with a hand-tuned solution shows that the automatically generated one is very competitive from the area, performance and power viewpoint, while design time is reduced from days to hours.

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Cited By

D'souza SJ SChattopadhyay S(2015)Integrated Mapping and Synthesis Techniques for Network-on-Chip Topologies with Express ChannelsACM Transactions on Architecture and Code Optimization10.1145/283123312:4(1-26)Online publication date: 16-Nov-2015
https://dl.acm.org/doi/10.1145/2831233
Condo CBaghdadi AMasera G(2015)Reducing the Dissipated Energy in Multi-standard Turbo and LDPC DecodersCircuits, Systems, and Signal Processing10.1007/s00034-014-9915-134:5(1571-1593)Online publication date: 1-May-2015
https://dl.acm.org/doi/10.1007/s00034-014-9915-1
J. SSharma AChattopadhyay S(2014)Multi-Application Network-on-Chip Design using Global Mapping and Local ReconfigurationACM Transactions on Reconfigurable Technology and Systems10.1145/25569447:2(1-24)Online publication date: 4-Jul-2014
https://dl.acm.org/doi/10.1145/2556944
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Information

Published In

cover image Guide Proceedings

DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings

March 2006

1390 pages

ISBN:3981080106

General Chair:
Georges Gielen
KU Leuven, BE

Sponsors

EDAA: European Design Automation Association
The EDA Consortium
IEEE-CS\DATC: The IEEE Computer Society

Publisher

European Design and Automation Association

Leuven, Belgium

Publication History

Published: 06 March 2006

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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;

Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

D'souza SJ SChattopadhyay S(2015)Integrated Mapping and Synthesis Techniques for Network-on-Chip Topologies with Express ChannelsACM Transactions on Architecture and Code Optimization10.1145/283123312:4(1-26)Online publication date: 16-Nov-2015
https://dl.acm.org/doi/10.1145/2831233
Condo CBaghdadi AMasera G(2015)Reducing the Dissipated Energy in Multi-standard Turbo and LDPC DecodersCircuits, Systems, and Signal Processing10.1007/s00034-014-9915-134:5(1571-1593)Online publication date: 1-May-2015
https://dl.acm.org/doi/10.1007/s00034-014-9915-1
J. SSharma AChattopadhyay S(2014)Multi-Application Network-on-Chip Design using Global Mapping and Local ReconfigurationACM Transactions on Reconfigurable Technology and Systems10.1145/25569447:2(1-24)Online publication date: 4-Jul-2014
https://dl.acm.org/doi/10.1145/2556944
Todorov VMueller-Gritschneder DReinig HSchlichtmann UMacii E(2013)A spectral clustering approach to application-specific network-on-chip synthesisProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485709(1783-1788)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485709
Sepulveda JGogniat GPires RChau WStrum MCavalcanti AMelcher EBecker J(2011)Dynamic NoC-based architecture for MPSoC security implementationProceedings of the 24th symposium on Integrated circuits and systems design10.1145/2020876.2020921(197-202)Online publication date: 30-Aug-2011
https://dl.acm.org/doi/10.1145/2020876.2020921
Sepúlveda JPires RStrum MChau W(2010)Implementation of QoSS (quality-of-security service) for NoC-based SoC protectionTransactions on computational science X10.5555/1985581.1985589(187-201)Online publication date: 1-Jan-2010
https://dl.acm.org/doi/10.5555/1985581.1985589
Leary GChatha KGivargis TDonlin A(2010)A holistic approach to network-on-chip synthesisProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1878961.1879001(213-222)Online publication date: 24-Oct-2010
https://dl.acm.org/doi/10.1145/1878961.1879001
Leary GChatha KRosenstiel WWakabayashi K(2009)Automated technique for design of NoC with minimal communication latencyProceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1629435.1629499(471-480)Online publication date: 11-Oct-2009
https://dl.acm.org/doi/10.1145/1629435.1629499
Hansson AGoossens KBekooij MHuisken J(2009)CoMPSoCACM Transactions on Design Automation of Electronic Systems10.1145/1455229.145523114:1(1-24)Online publication date: 23-Jan-2009
https://dl.acm.org/doi/10.1145/1455229.1455231
Stensgaard MSparsø J(2008)ReNoCProceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip10.5555/1397757.1397985(55-64)Online publication date: 7-Apr-2008
https://dl.acm.org/doi/10.5555/1397757.1397985
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