Delay macromodels for the timing analysis of GaAs DCFL
References
[1]
S.i. Long and S. E. Burner, Gallium Arsenide Digital Integrated Circuit Design, McGraw-Hill, 1990.
[2]
T.N. Mudge, R. B. Brown, W. P. Birmingham, J. A. Dykstra, A. I. Kayssi, R. J. Lomax, O. A. Olukoum, and K. A. SakaHah, "The Design of a Microsupercomlmter," IEEE Computer, pp. 57-64, January 1991.
[3]
J. Rubenste~ P. Penfield, and M. A. Horowitz, "Signal Delay in RC Tree Networks," IEEE Transactions on Computer-Aided Design, pp. 202-211, July 1983.
[4]
E. Buckingham, "Model Experiments and the Forms of Empirical Equations," Transactions of the ASME, vol. 37, pp. 263-296, 1915.
[5]
A.I. Kayssi, K. A. SakaIIah, and T. M. Burks, "Analytical Transient Response of CMOS Inverters," IEEE Trwgs~tions on Circuits and Systems, pp. 42--45, January 1992.
[6]
Foundry Design Manual, Vitesse Semiconductor Corp, 1991.
[7]
HSPICE User's Manual, Meta-Software, 1991.
Index Terms
- Delay macromodels for the timing analysis of GaAs DCFL
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Published: 01 November 1992
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