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Efficient on-line testing of FPGAs with provable diagnosabilities

Published: 07 June 2004 Publication History

Abstract

We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than prior FPGA testing methods. We present 1- and 2-diagnosable built-in self-tester (BISTer) designs that make up the ROTE, and that avoid expensive adaptive diagnosis. To the best of our knowledge, this is the first time that a BISTer design with diagnosability greater than one has been developed for FPGAs. We also develop functional testing methods that test PLBs in only two circuit functions that will be mapped to them (as opposed to testing PLBs in all their operational modes) as the ROTE moves across a functioning FPGA. Simulation results show that our 1-diagnosable BISTer and our functional testing technique leads to significantly more accurate (98% fault coverage at a fault/defect density of 10%) and faster test-and-diagnosis of FPGAs than achieved by previous work. The fault coverage of ROTE is also expected to be high at fault/defect densities of up to 25% using our 1-diagnosable BISTer and up to 33% using our 2-diagnosable BISTer. Our methods should thus prove useful for testing current very deep submicron FPGAs as well as future nano-CMOS and molecular nanotechnology FPGAs in which defect densities are expected to be in the 10% range.

References

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M. Abramovici, C. Stroud, S. Wijesuriya and V. Verma, "Using Roving STARs for On-Line Testing and Diagnosis of FPGAs in Fault-Tolerant Applications", Proc. IEEE International Test Conf., Sept'99.
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Cited By

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  • (2017)Aging Resilience and Fault Tolerance in Runtime Reconfigurable ArchitecturesIEEE Transactions on Computers10.1109/TC.2016.261640566:6(957-970)Online publication date: 1-Jun-2017
  • (2013)TeMNOTMicroprocessors & Microsystems10.1016/j.micpro.2012.05.01137:2(129-146)Online publication date: 1-Mar-2013
  • (2007)System-on-Chip Test ArchitecturesundefinedOnline publication date: 20-Nov-2007
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        cover image ACM Conferences
        DAC '04: Proceedings of the 41st annual Design Automation Conference
        June 2004
        1002 pages
        ISBN:1581138288
        DOI:10.1145/996566
        • General Chair:
        • Sharad Malik,
        • Program Chairs:
        • Limor Fix,
        • Andrew B. Kahng
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Published: 07 June 2004

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        Author Tags

        1. FPGAs
        2. built-in self-tester (BISTer)
        3. diagnosability
        4. functional testing
        5. on-line testing
        6. roving tester (ROTE)

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        View all
        • (2017)Aging Resilience and Fault Tolerance in Runtime Reconfigurable ArchitecturesIEEE Transactions on Computers10.1109/TC.2016.261640566:6(957-970)Online publication date: 1-Jun-2017
        • (2013)TeMNOTMicroprocessors & Microsystems10.1016/j.micpro.2012.05.01137:2(129-146)Online publication date: 1-Mar-2013
        • (2007)System-on-Chip Test ArchitecturesundefinedOnline publication date: 20-Nov-2007
        • (2006)Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faultsProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131803(1165-1170)Online publication date: 6-Mar-2006
        • (2005)High-diagnosability online built-in self-test of FPGAs via iterative bootstrappingProceedings of the 15th ACM Great Lakes symposium on VLSI10.1145/1057661.1057682(78-83)Online publication date: 17-Apr-2005

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