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Scheduling high-level blocks for functional simulation

Authors:

Z. Wang,

P. M. MaurerAuthors Info & Claims

DAC '89: Proceedings of the 26th ACM/IEEE Design Automation Conference

Pages 87 - 90

https://doi.org/10.1145/74382.74398

Published: 01 June 1989 Publication History

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Abstract

This paper presents a method for scheduling high-level blocks for functional simulation under the assumptions that circuits may be cyclic (due to element grouping), and that blocks cannot be broken down into simpler elements. The solution presented here may simulate one block many times per clock period. Obtaining a minimal schedule for a cyclic circuit is shown to be NP-complete, and two approximation algorithms are presented, along with empirical data to evaluate their effectiveness.

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Cited By

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Maurer P(2006)Two new techniques for unit-delay compiled simulationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.15999811:9(1120-1130)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.159998
Beetem J(2006)Hierarchical topological sorting of apparent loops via partitioningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.12762211:5(607-619)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.127622
Salman SAklil DStirling R(2002)Development of a simulator suitable for the application of substation control systemsIEEE/PES Transmission and Distribution Conference and Exhibition10.1109/TDC.2002.1177712(1714-1718)Online publication date: 2002
https://doi.org/10.1109/TDC.2002.1177712
Show More Cited By

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Scheduling high-level blocks for functional simulation

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Published In

DAC '89: Proceedings of the 26th ACM/IEEE Design Automation Conference

June 1989

839 pages

ISBN:0897913108

DOI:10.1145/74382

Chairman:
Donald E. Thomas
Carnegie Mellon Univ., Pittsburgh, PA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 June 1989

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DAC89: The 26th ACM/IEEE-CS Design Automation Conference

June 25 - 28, 1989

Nevada, Las Vegas, USA

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DAC '89 Paper Acceptance Rate 156 of 465 submissions, 34%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all

Maurer P(2006)Two new techniques for unit-delay compiled simulationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.15999811:9(1120-1130)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.159998
Beetem J(2006)Hierarchical topological sorting of apparent loops via partitioningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.12762211:5(607-619)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.127622
Salman SAklil DStirling R(2002)Development of a simulator suitable for the application of substation control systemsIEEE/PES Transmission and Distribution Conference and Exhibition10.1109/TDC.2002.1177712(1714-1718)Online publication date: 2002
https://doi.org/10.1109/TDC.2002.1177712
Jennings GIsaksson JLindgren P(1994)Ordered ternary decision diagrams and the multivalued compiled simulation of unmapped logic27th Annual Simulation Symposium10.1109/SIMSYM.1994.283108(99-105)Online publication date: 1994
https://doi.org/10.1109/SIMSYM.1994.283108
Beetem J(1992)Rapid implementation of hierarchical integrated simulators using Galaxy[1991 Proceedings] The Second International Workshop on Rapid System Prototyping10.1109/IWRSP.1991.218611(181-199)Online publication date: 1992
https://doi.org/10.1109/IWRSP.1991.218611
Jennings GAmbler TJess JDe Man H(1991)GRTLProceedings of the conference on European design automation10.5555/951513.951605(424-428)Online publication date: 25-Feb-1991
https://dl.acm.org/doi/10.5555/951513.951605
Jennings GZobrist G(1991)A case against event-driven simulation for digital system designProceedings of the 24th annual symposium on Simulation10.5555/306792.306855(170-176)Online publication date: 1-Apr-1991
https://dl.acm.org/doi/10.5555/306792.306855
Maurer PWang ZSmith R(1991)Techniques for unit-delay compiled simulationProceedings of the 27th ACM/IEEE Design Automation Conference10.1145/123186.123346(480-484)Online publication date: 3-Jan-1991
https://dl.acm.org/doi/10.1145/123186.123346
Jennings G(1991)A case against event-driven simulation for digital system designACM SIGSIM Simulation Digest10.1145/106073.30685521:3(170-176)Online publication date: 1-Apr-1991
https://dl.acm.org/doi/10.1145/106073.306855
Jennings G(1991)A case against event-driven simulation for digital system design[1991] Proceedings of the 24th Annual Simulation Symposium10.1109/SIMSYM.1991.151502(170-176)Online publication date: 1991
https://doi.org/10.1109/SIMSYM.1991.151502
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Functional abstraction in switch-level simulation

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