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Floorplan area minimization using Lagrangian relaxation

Published: 01 May 2000 Publication History
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References

[1]
M. Kang and W. W.M. Dai. General Floorplanning with L-shaped, T-shaped and Soft Blocks Based on Bounded Slicing Grid Structure. IEEE Asia and South Pacific Design Automation Conference, pages 265-270, 1997.
[2]
T.-S. Moh, T.-S. Chang, and S. L. Hakimi. Globally Optimal Floorplanning for a Layout Problem. IEEE Transaction on Circuit and Systems - I: Fundamental Theory and Applications, 43(9):713-720, 1996.
[3]
M.S. Bazaraa and H.D. Sherali and C.M. Sherry. Nonlinear Programming: Theory and Algorithms. John Wiley & Sons, Inc., second edition, 1997.
[4]
H. Murata and Ernest S. Kuh. Sequence-Pair Based Placement Method for Hard/Soft/Pre-placed Modules. International Symposium on Physical Design, pages 167-172, 1998.
[5]
S. Nakatake, K. Fujiyoushi, H. Murata, and Y. Kajitani. Module Placement on BSG-Structure and I C Layout Applications. Proceedings IEEE International Conference on Computer-Aided Design, pages 484-491, 1996.
[6]
Peichen Pan and C.L. Liu. Area Minimization for General Floorplans. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pages 606-609, 1992.
[7]
L. Stockmeyer. Optimal Orientations of Cells in Slicing Floorplan Designs. Information and Control, 59:91-101, 1983.
[8]
Ting-Chi Wang and D.F. Wong. An Optimal Algorithm for Floorplan Area Optimization. Proceedings of the A CM/IEEE Design Automation Conference, pages 180-186, 1990.
[9]
Ting-Chi Wang and D.F. Wong. Optimal Floorplan Area Optimization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2(8):992-1001, 1992.
[10]
D.F. Wong and C.L. Liu. A New Algorithm for Floorplan Design. Proceedings of the 23rd A CM/IEEE Design Automation Conference, pages 101-107, 1986.

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  • (2020)Lagrangian Relaxation-Based Time-Division Multiplexing Optimization for Multi-FPGA SystemsACM Transactions on Design Automation of Electronic Systems10.1145/337755125:2(1-23)Online publication date: 3-Feb-2020
  • (2017)WIP: Optimization algorithms: A key component of EDA education2017 IEEE International Conference on Microelectronic Systems Education (MSE)10.1109/MSE.2017.7945083(45-46)Online publication date: May-2017
  • (2007)MB∗-TreeIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2007.89136826:8(1430-1444)Online publication date: 1-Aug-2007
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  1. Floorplan area minimization using Lagrangian relaxation

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    cover image ACM Conferences
    ISPD '00: Proceedings of the 2000 international symposium on Physical design
    May 2000
    215 pages
    ISBN:1581131917
    DOI:10.1145/332357
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    Published: 01 May 2000

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    Cited By

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    • (2020)Lagrangian Relaxation-Based Time-Division Multiplexing Optimization for Multi-FPGA SystemsACM Transactions on Design Automation of Electronic Systems10.1145/337755125:2(1-23)Online publication date: 3-Feb-2020
    • (2017)WIP: Optimization algorithms: A key component of EDA education2017 IEEE International Conference on Microelectronic Systems Education (MSE)10.1109/MSE.2017.7945083(45-46)Online publication date: May-2017
    • (2007)MB∗-TreeIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2007.89136826:8(1430-1444)Online publication date: 1-Aug-2007
    • (2007)Optimizing the FPGA Implementation of HRT SystemsProceedings of the 13th IEEE Real Time and Embedded Technology and Applications Symposium10.1109/RTAS.2007.25(22-31)Online publication date: 3-Apr-2007
    • (2006)Area optimization of delay-optimized structures using intrinsic constraint graphsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2004.82812423:6(888-906)Online publication date: 1-Nov-2006
    • (2006)Simultaneous floor plan and buffer-block optimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2004.82658223:5(694-703)Online publication date: 1-Nov-2006
    • (2006)Nonrectangular shaping and sizing of soft modules for floorplan-design improvementIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2003.81989623:1(71-79)Online publication date: 1-Nov-2006
    • (2004)Area reduction on interconnect optimized floorplan using deadspace utilizationThe 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.10.1109/MWSCAS.2004.1354023(1_445-1_448)Online publication date: 2004
    • (2003)Multilevel floorplanning/placement for large-scale modules using B*-treesProceedings of the 40th annual Design Automation Conference10.1145/775832.776037(812-817)Online publication date: 2-Jun-2003
    • (2003)Simultaneous floorplanning and buffer block planningProceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119858(431-434)Online publication date: 21-Jan-2003
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