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COMET: communication-optimised multi-threaded error-detection technique

Authors:

Konstantina Mitropoulou,

Vasileios Porpodas,

Timothy M. JonesAuthors Info & Claims

CASES '16: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems

Article No.: 7, Pages 1 - 10

https://doi.org/10.1145/2968455.2968508

Published: 01 October 2016 Publication History

Abstract

Relentless technology scaling has made transistors more vulnerable to soft, or transient, errors. To keep systems robust against these, current error detection techniques use different types of redundancy at the hardware or the software level. A consequence of these additional protection mechanisms is that these systems tend to become slower. In particular, software error-detection techniques degrade performance considerably, limiting their uptake.

This paper focuses on software redundant multi-threading error detection, a compiler-based technique that makes use of redundant cores within a multi-core system to perform error checking. Implementations of this scheme feature two threads that execute almost the same code: the main thread runs the original code and the checker thread executes code to verify the correctness of the original. The main thread communicates the values that require checking to the checker thread to use in its comparisons.

We identify a major performance bottleneck in existing schemes: poorly performing inter-core communication and the generated code associated with it. Our study shows this is a major performance impediment within existing techniques since the two threads require extremely fine-grained communication, on the order of every few instructions. We alleviate this bottleneck with a series of code generation optimisations at the compiler level. We propose COMET (Communication-Optimised Multi-threaded Error-detection Technique), which improves performance across the NAS parallel benchmarks by 31.4% (on average) compared to the state-of-the-art, without affecting fault-coverage.

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Cited By

Venkatesha SParthasarathi R(2024)Survey on Redundancy Based-Fault tolerance methods for Processors and Hardware accelerators - Trends in Quantum Computing, Heterogeneous Systems and ReliabilityACM Computing Surveys10.1145/366367256:11(1-76)Online publication date: 6-May-2024
https://dl.acm.org/doi/10.1145/3663672
Serrano-Cases AMartínez-Álvarez ABastos RCuenca-Asensi S(2023)Bare-Metal Redundant Multi-Threading on Multicore SoCs Under Neutron IrradiationIEEE Transactions on Nuclear Science10.1109/TNS.2023.324712970:8(1643-1651)Online publication date: Aug-2023
https://doi.org/10.1109/TNS.2023.3247129
Ko Y(2022)Survey of Software-Implemented Soft Error ProtectionElectronics10.3390/electronics1103045611:3(456)Online publication date: 3-Feb-2022
https://doi.org/10.3390/electronics11030456
Show More Cited By

Index Terms

COMET: communication-optimised multi-threaded error-detection technique
1. Computer systems organization
  1. Dependable and fault-tolerant systems and networks
    1. Reliability
2. Software and its engineering
  1. Software notations and tools
    1. Compilers
      1. Source code generation

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CASES '16: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems

October 2016

187 pages

ISBN:9781450344821

DOI:10.1145/2968455

Copyright © 2016 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 October 2016

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ESWEEK'16

ESWEEK'16: TWELFTH EMBEDDED SYSTEM WEEK

October 1 - 7, 2016

Pennsylvania, Pittsburgh

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Overall Acceptance Rate 52 of 230 submissions, 23%

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Cited By

Venkatesha SParthasarathi R(2024)Survey on Redundancy Based-Fault tolerance methods for Processors and Hardware accelerators - Trends in Quantum Computing, Heterogeneous Systems and ReliabilityACM Computing Surveys10.1145/366367256:11(1-76)Online publication date: 6-May-2024
https://dl.acm.org/doi/10.1145/3663672
Serrano-Cases AMartínez-Álvarez ABastos RCuenca-Asensi S(2023)Bare-Metal Redundant Multi-Threading on Multicore SoCs Under Neutron IrradiationIEEE Transactions on Nuclear Science10.1109/TNS.2023.324712970:8(1643-1651)Online publication date: Aug-2023
https://doi.org/10.1109/TNS.2023.3247129
Ko Y(2022)Survey of Software-Implemented Soft Error ProtectionElectronics10.3390/electronics1103045611:3(456)Online publication date: 3-Feb-2022
https://doi.org/10.3390/electronics11030456
Pena-Fernandez MSerrano-Cases ALindoso ACuenca-Asensi SEntrena LMorilla YMartin-Holgado PMartinez-Alvarez A(2022)Hybrid Lockstep Technique for Soft Error MitigationIEEE Transactions on Nuclear Science10.1109/TNS.2022.314986769:7(1574-1581)Online publication date: Jul-2022
https://doi.org/10.1109/TNS.2022.3149867
Liu ZZhang ZXi RZhu PMa B(2022)SoK: A Survey on Redundant Execution Technology2021 International Conference on Advanced Computing and Endogenous Security10.1109/IEEECONF52377.2022.10013333(1-14)Online publication date: 21-Apr-2022
https://doi.org/10.1109/IEEECONF52377.2022.10013333
Zeng JKim HLee JJung C(2021)Turnpike: Lightweight Soft Error Resilience for In-Order CoresMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480042(654-666)Online publication date: 18-Oct-2021
https://dl.acm.org/doi/10.1145/3466752.3480042
Hartono AFetzer C(2021)BROFY: Towards Essential Integrity Protection for Microservices2021 40th International Symposium on Reliable Distributed Systems (SRDS)10.1109/SRDS53918.2021.00024(154-163)Online publication date: Sep-2021
https://doi.org/10.1109/SRDS53918.2021.00024
Wu HGuo RHu Y(2021)FERNANDO: A Software Transient Fault Tolerance Approach for Embedded Systems Based on Redundant Multi-ThreadingIEEE Access10.1109/ACCESS.2021.30771909(67154-67166)Online publication date: 2021
https://doi.org/10.1109/ACCESS.2021.3077190
Zhang GLiu YYang HQian D(2021)Efficient detection of silent data corruption in HPC applications with synchronization-free message verificationThe Journal of Supercomputing10.1007/s11227-021-03892-4Online publication date: 9-Jun-2021
https://doi.org/10.1007/s11227-021-03892-4
Arslan SUnsal O(2021)Efficient selective replication of critical code regions for SDC mitigation leveraging redundant multithreadingThe Journal of Supercomputing10.1007/s11227-021-03804-6Online publication date: 10-May-2021
https://doi.org/10.1007/s11227-021-03804-6
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