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Improving functional density through run-time constant propagation

Authors:

Michael J. Wirthlin,

Brad L. HutchingsAuthors Info & Claims

FPGA '97: Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays

Pages 86 - 92

https://doi.org/10.1145/258305.258316

Published: 09 February 1997 Publication History

Abstract

Circuit specialization techniques such as constant propagation are commonly used to reduce both the hardware resources and cycle time of digital circuits. When reconfigurable FPGAs are used, these advantages can be extended by dynamically specializing circuits using run-time reconfiguration (RTR). For systems exploiting constant propagation, hardware resources can be reduced by folding constants within the circuit and dynamically changing the constants using circuit reconfiguration. To measure the benefits of circuit specialization, a functional density metric is presented. This metric allows the analysis of both static and run-time reconfigured circuits by including the cost of circuit reconfiguration. This metric will be used to justify runtime constant propagation as well as analyze the effects of reconfiguration time on run-time reconfigured systems.

References

[1]

P. W. Foulk. Data-folding in SRAM configurable FPGAs. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 163-171, Napa, CA, April 1993.

[2]

Andr~ DeHon. Reconfigurable Architectures for General-Purpose Computing. P hD thesis, Massachusetts Institute of Technology, 1996.

Digital Library

[3]

A. Girl, V. Visvanathan, S.K. Nandy, and S.K. Ghoshal. High speed digital filtering on SRAM- based FPGAs. 7th International Conference on VLSI Design, pages 229-232, January 1994.

[4]

Les Mintzer. FIR filters with field-programmable gate arrays. Journal of VLSI Signal Processing, 6(2):119-127, 1993.

Digital Library

[5]

G. It. Goslin. Using Xilinx FPGAs to design custom digital signal processing devices. In 1995 Proceedings of DSPX, pages 565-604, January 1995.

[6]

C. Chou, S. Mohanakrishnan, and j. B. Evans. FPGA implementation of digital filters. In Proceedings of the Fourth International Conference on Signal Processing Applications and Technology, pages 80-88, Santa Clara, CA, 1993.

[7]

M. van Daalen, P. Jeavons, and J. Shawe-Taylor. A stochastic neural architecture that exploits dynamically reconfigurable FPGAs. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 202-211, Napa, CA, April 1993.

[8]

C.E. Cox and W. E. Blanz. GANGLION - a fast field-programmable gate array implementation of a connectionist classifier. IEEE Journal of Solid- State Circuits, 27(3):288-299, March 1992.

[9]

B. Gunther, G. Milne, and L. Narasimhan. Assessing document relevance with run-time reconfigurable machines. In J. Arnold and K. L. Pocek, editors, Proceedings of iEEE Workshop on FP- GAs for Custom Computing Machines, Napa, CA, April 1996.

[10]

E. Lemoine and D. Merceron. Run time reconfiguration of FPGA for scanning genomic databases. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 90-98, Napa, CA, April 1995.

Digital Library

[11]

B. L. Hutchings and M. J. Wirthlin. Implementation approaches for reconfigurable logic applications. In W. Moore and W. Luk, editors, Field- Programmable Logic and Applications, pages 419- 428, Oxford, England, August 1995. Springer.

Digital Library

[12]

P. Lysaght, J. Stockwood, J. Law, and D. Girma. Artificial neural network implementation on a fine-gra:med FPGA. In R. Hartenstein and M. Z. Servit, editors, Field-Programmable Logic: Architectures, Synthesis and Applications. ~th International Workshop on Field-Programmable Logic and Applications, pages 421-431, Prague, Czech Republic, September 1994. Springer-Verlag.

Digital Library

[13]

J. Villasenor, B. Schoner, K. Chia, and C. Zapata. Configurable computing solutions for automatic target recognition. In J. Arnold and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, Napa, CA, April 1996.

[14]

Michael A. Rencher. A comparison of FPGA platforms through SAR/ATR algorithm implementation. Master's thesis, Brigham Young University, 1996.

[15]

National Semiconductor. Configurable Logic Array (CLAy) Data Sheet, December 1993.

[16]

Atmel, San Jose, CA. Configurable Logic: Design F.4 Application Book, 1993-1994.

[17]

Xilinx. XC6~00 Field Programmable Gate Arrays, 1996.

[18]

J. D. Hadley and B. L. Hutchings. Design methodologies for partially reconfigured systems. In P. Athanas and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 78-84, Napa, CA, April 1995.

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Cited By

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Index Terms

Improving functional density through run-time constant propagation
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Arithmetic and datapath circuits
  2. Very large scale integration design
    1. Application-specific VLSI designs

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cover image ACM Conferences

FPGA '97: Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays

February 1997

174 pages

ISBN:0897918010

DOI:10.1145/258305

Chairman:
Carl Ebeling
Univ. of Washington

Copyright © 1997 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 09 February 1997

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FPGA97: 1997 ACM/SIGDA International Symposium on Field Programmable Gate Arrays

February 9 - 11, 1997

California, Monterey, USA

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Cited By

Berndt AMeinhardt CReis AButzen P(2022)Optimizing machine learning logic circuits with constant signal propagationIntegration, the VLSI Journal10.1016/j.vlsi.2022.08.00487:C(293-305)Online publication date: 1-Nov-2022
https://dl.acm.org/doi/10.1016/j.vlsi.2022.08.004
Berndt AMeinhardt CReis AButzen P(2021)Exploring Constant Signal Propagation to Optimize Neural Network Circuits2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)10.1109/SBCCI53441.2021.9529971(1-6)Online publication date: 23-Aug-2021
https://doi.org/10.1109/SBCCI53441.2021.9529971
Li LKim JXu JZhou X(2018)Time-dependent route scheduling on road networksSIGSPATIAL Special10.1145/3231541.323154510:1(10-14)Online publication date: 5-Jun-2018
https://dl.acm.org/doi/10.1145/3231541.3231545
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