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Compacting MIMOLA microcode

Published: 01 December 1987 Publication History

Abstract

We address the problem of reducing the word length of microprograms. Two techniques are described: overlaying of fields and encoding of the microprogram. Formal analyses are presented of different encoding methods, assuming a VLSI implementation. A maximal encoding strategy appears to be the most area-efficient. Field overlaying is formulated as a clique-partitioning problem, and an efficient and practical clique-partitioning algorithm is presented. Based on these results, a microword compaction strategy that consists of field overlaying followed by maximal encoding has been implemented for the MIMOLA synthesis system (a design tool that generates excessively long microinstructions). Some considerations that are relevant to MIMOLA, and probably general to other similar tools, are discussed.

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Cited By

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  • (2002)Enhanced crosstalk fault model and methodology to generate tests for arbitrary inter-core interconnect topologyProceedings of the 11th Asian Test Symposium, 2002. (ATS '02).10.1109/ATS.2002.1181705(163-169)Online publication date: 2002
  • (1989)Level synthesis approach to application-specific integrated circuits (ASIC) designProceedings., Second Annual IEEE ASIC Seminar and Exhibit10.1109/ASIC.1989.123164(T7-1/1-7)Online publication date: 1989

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cover image ACM Conferences
MICRO 20: Proceedings of the 20th annual workshop on Microprogramming
December 1987
174 pages
ISBN:0897912500
DOI:10.1145/255305
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 December 1987

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Author Tags

  1. clique partitioning
  2. compaction
  3. microprogramming
  4. synthesis

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Cited By

View all
  • (2002)Enhanced crosstalk fault model and methodology to generate tests for arbitrary inter-core interconnect topologyProceedings of the 11th Asian Test Symposium, 2002. (ATS '02).10.1109/ATS.2002.1181705(163-169)Online publication date: 2002
  • (1989)Level synthesis approach to application-specific integrated circuits (ASIC) designProceedings., Second Annual IEEE ASIC Seminar and Exhibit10.1109/ASIC.1989.123164(T7-1/1-7)Online publication date: 1989

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