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View all- Vinnakota BAndrews J(2018)Fast fault translationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/92.6612546:1(122-133)Online publication date: 29-Dec-2018
Functional test generation for FSMs by fault extraction
Pages 712 - 715
References
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P.C. Maxwell and R.C. Aitken, ~All fault coverages are not created equal," IEEE Design and Test of Computers, pp. 42-51, March 1993.
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K-T. Cheng and J.Y. Jou, ~A Functional fault model for sequential machines," IEEE T-CAD, pp. 1065-1073, Sep. 1992.
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I. Pomeranz and S.M. Reddy, ~Test generation for synchronous sequential circuits based on fault extraction," in Proc. ICCAD, pp. 450-453, 1991.
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M.K. Srinivas, J. Jacob, and V.D. Agrawal, ~Finite state machine testing based on growth and disappearance faults," in Proc. FTCS, 1992, pp. 238-245.
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M. Abromovici, M.A. Breuer, and A.D. Friedman, Digital Systems Testing and Testable Design, Rockville, MD, Computer Science Press, 1990.
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P. Goel, ~An implicit enumeration algorithm to generate tests for combinational logic circuits," IEEE Trans. Comput., pp. 215-222, Mar. 1981.
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R. Lisanke, ~Finite-state machine benchmark set," Preliminary benchmark collection, Sept. 1987.
Index Terms
- Functional test generation for FSMs by fault extraction
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View all- Vinnakota BAndrews J(2018)Fast fault translationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/92.6612546:1(122-133)Online publication date: 29-Dec-2018
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