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IVEC: off-chip memory integrity protection for both security and reliability

Authors:

G. Edward SuhAuthors Info & Claims

ISCA '10: Proceedings of the 37th annual international symposium on Computer architecture

Pages 395 - 406

https://doi.org/10.1145/1815961.1816015

Published: 19 June 2010 Publication History

Abstract

This paper proposes a unified off-chip memory integrity protection scheme, named IVEC. Today, a system needs two independent mechanisms in order to protect the memory integrity from both physical attacks and random errors. Integrity verification schemes detect malicious tampering of memory while error correcting codes (ECC) detect and correct random errors. IVEC enables both detection of malicious attacks for security and correction of random errors for reliability at the same time by extending the integrity verification techniques. Analytical and experimental studies show that IVEC can correct single-bit errors and even multi-bit errors from one DRAM chip within a cache block read without any additional ECC bits, when the integrity verification is also required for security, effectively removing the memory and bandwidth overheads (12.5%) of typical ECC schemes. Alternatively, with parity bits, IVEC can provide even stronger error correction capabilities comparable to the traditional chip-kill correct, still with less overheads. For both cases, IVEC can use standard non-ECC DIMMs.

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Cited By

Manzhosov ESethumadhavan S(2024)Polymorphic Error Correction2024 57th IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO61859.2024.00027(246-262)Online publication date: 2-Nov-2024
https://doi.org/10.1109/MICRO61859.2024.00027
Juffinger JNeela SHeckel MSchwarz LAdamsky FGruss D(2024)Presshammer: Rowhammer and Rowpress Without Physical Address InformationDetection of Intrusions and Malware, and Vulnerability Assessment10.1007/978-3-031-64171-8_24(460-479)Online publication date: 9-Jul-2024
https://doi.org/10.1007/978-3-031-64171-8_24
Lamster LUnterguggenberger MSchrammel DMangard SCalandrino JTroncoso C(2023)HashTagProceedings of the 32nd USENIX Conference on Security Symposium10.5555/3620237.3620394(2797-2814)Online publication date: 9-Aug-2023
https://dl.acm.org/doi/10.5555/3620237.3620394
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Index Terms

IVEC: off-chip memory integrity protection for both security and reliability
1. Hardware
  1. Hardware test
    1. Memory test and repair
  2. Robustness
    1. Fault tolerance
      1. Error detection and error correction

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Published In

cover image ACM Conferences

ISCA '10: Proceedings of the 37th annual international symposium on Computer architecture

June 2010

520 pages

ISBN:9781450300537

DOI:10.1145/1815961

General Chair:
André Seznec
INRIA Rennes
,
Program Chairs:
Uri Weiser
Technion
,
Ronny Ronen
Intel

ACM SIGARCH Computer Architecture News Volume 38, Issue 3
ISCA '10
June 2010
508 pages
ISSN:0163-5964
DOI:10.1145/1816038
Issue’s Table of Contents

Copyright © 2010 ACM.

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Published: 19 June 2010

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ISCA '10: The 37th Annual International Symposium on Computer Architecture

June 19 - 23, 2010

Saint-Malo, France

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Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Cited By

Manzhosov ESethumadhavan S(2024)Polymorphic Error Correction2024 57th IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO61859.2024.00027(246-262)Online publication date: 2-Nov-2024
https://doi.org/10.1109/MICRO61859.2024.00027
Juffinger JNeela SHeckel MSchwarz LAdamsky FGruss D(2024)Presshammer: Rowhammer and Rowpress Without Physical Address InformationDetection of Intrusions and Malware, and Vulnerability Assessment10.1007/978-3-031-64171-8_24(460-479)Online publication date: 9-Jul-2024
https://doi.org/10.1007/978-3-031-64171-8_24
Lamster LUnterguggenberger MSchrammel DMangard SCalandrino JTroncoso C(2023)HashTagProceedings of the 32nd USENIX Conference on Security Symposium10.5555/3620237.3620394(2797-2814)Online publication date: 9-Aug-2023
https://dl.acm.org/doi/10.5555/3620237.3620394
Park JKang SLee SKim TPark JKwon YHuh J(2023)Hardware Hardened Sandbox Enclaves for Trusted Serverless ComputingACM Transactions on Architecture and Code Optimization10.1145/3632954Online publication date: 14-Nov-2023
https://doi.org/10.1145/3632954
Juffinger JLamster LKogler AEichlseder MLipp MGruss D(2023)CSI:Rowhammer – Cryptographic Security and Integrity against Rowhammer2023 IEEE Symposium on Security and Privacy (SP)10.1109/SP46215.2023.10179390(1702-1718)Online publication date: May-2023
https://doi.org/10.1109/SP46215.2023.10179390
Fakhrzadehgan APatt YNair PQureshi M(2022)SafeGuard: Reducing the Security Risk from Row-Hammer via Low-Cost Integrity Protection2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA53966.2022.00035(373-386)Online publication date: Apr-2022
https://doi.org/10.1109/HPCA53966.2022.00035
Wang ZZhu ZWang LTong ZYan C(2020)SCPORAM: A Hardware Support Scheme for Protecting Memory Access Patterns2020 IEEE 19th International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom)10.1109/TrustCom50675.2020.00131(983-990)Online publication date: Dec-2020
https://doi.org/10.1109/TrustCom50675.2020.00131
Taassori MBalasubramonian RChhabra SAlameldeen APeddireddy MAgarwal RStutsman RMartínez JDuato JEeckhout L(2020)Compact leakage-free support for integrity and reliabilityProceedings of the ACM/IEEE 47th Annual International Symposium on Computer Architecture10.1109/ISCA45697.2020.00066(735-748)Online publication date: 30-May-2020
https://dl.acm.org/doi/10.1109/ISCA45697.2020.00066
Nair PAsgari BQureshi M(2019)SuDoku: Tolerating High-Rate of Transient Failures for Enabling Scalable STTRAM2019 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)10.1109/DSN.2019.00048(388-400)Online publication date: Jun-2019
https://doi.org/10.1109/DSN.2019.00048
Taassori MShafiee ABalasubramonian R(2018)VAULTACM SIGPLAN Notices10.1145/3296957.317715553:2(665-678)Online publication date: 19-Mar-2018
https://dl.acm.org/doi/10.1145/3296957.3177155
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