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A unifying view of loosely time-triggered architectures

Published: 24 October 2010 Publication History

Abstract

Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz' Time-Triggered Architectures (TTA) have been proposed as both an architecture and a comprehensive paradigm for systems architecture, for such systems. To relax the strict requirements on synchronization imposed by TTA, Loosely Time-Triggered Architectures (LTTA) have been recently proposed. In LTTA, computation and communication units at all triggered by autonomous, non synchronized, clocks. Communication media act as shared memories between writers and readers and communication is non blocking. In this paper we pursue our previous work by providing a unified presentation of the two variants of LTTA (token- and time-based), with simplified analyses. We compare these two variants regarding performance and robustness and we provide ways to combine them.

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Published In

cover image ACM Conferences
EMSOFT '10: Proceedings of the tenth ACM international conference on Embedded software
October 2010
318 pages
ISBN:9781605589046
DOI:10.1145/1879021
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 24 October 2010

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Author Tags

  1. distributed architecture
  2. embedded systems
  3. loosely time triggered architecture
  4. time triggered architecture

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  • Research-article

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ESWeek '10
ESWeek '10: Sixth Embedded Systems Week
October 24 - 29, 2010
Arizona, Scottsdale, USA

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Overall Acceptance Rate 60 of 203 submissions, 30%

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Cited By

View all
  • (2021)MSYNC: A Generalized Formal Design Pattern for Virtually Synchronous Multirate Cyber-physical SystemsACM Transactions on Embedded Computing Systems10.1145/347703620:5s(1-26)Online publication date: 17-Sep-2021
  • (2020)Cyber risk at the edge: current and future trends on cyber risk analytics and artificial intelligence in the industrial internet of things and industry 4.0 supply chainsCybersecurity10.1186/s42400-020-00052-83:1Online publication date: 2-Jun-2020
  • (2020)Artificial intelligence and machine learning in dynamic cyber risk analytics at the edgeSN Applied Sciences10.1007/s42452-020-03559-42:11Online publication date: 6-Oct-2020
  • (2020)Future developments in standardisation of cyber risk in the Internet of Things (IoT)SN Applied Sciences10.1007/s42452-019-1931-02:2Online publication date: 8-Jan-2020
  • (2018)A Unified Programming Model for Time- and Data-Driven Embedded Applications2018 26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)10.1109/PDP2018.2018.00013(26-33)Online publication date: Mar-2018
  • (2017)Secure Deterministic L2/L3 Ethernet Networking for Integrated ArchitecturesSAE Technical Paper Series10.4271/2017-01-2103Online publication date: 19-Sep-2017
  • (2016)Loosely Time-Triggered ArchitecturesACM Transactions on Embedded Computing Systems10.1145/293218915:4(1-26)Online publication date: 2-Aug-2016
  • (2016)Formal modelling and verification of GALS systems using GRL and CADPFormal Aspects of Computing10.1007/s00165-016-0373-328:5(767-804)Online publication date: 1-Sep-2016
  • (2015)Loosely time-triggered architecturesProceedings of the 12th International Conference on Embedded Software10.5555/2830865.2830875(85-94)Online publication date: 4-Oct-2015
  • (2015)Design and Verification for Complex Deterministic Ethernet Networks in IMA SystemsSAE Technical Paper Series10.4271/2015-01-2527Online publication date: 15-Sep-2015
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