research-article

A -60dB THD/100MHz true unity-gain voltage buffer CMOS circuit

Authors:

André Luís Fortunato,

Carlos Alberto dos Reis FilhoAuthors Info & Claims

SBCCI '10: Proceedings of the 23rd symposium on Integrated circuits and system design

Pages 33 - 36

https://doi.org/10.1145/1854153.1854164

Published: 06 September 2010 Publication History

Get Access

Abstract

In this paper an open-loop CMOS voltage buffer is unveiled which features less than -60dB THD within a bandwidth of 100MHz and large-signal gain that departs from unity a maximum of 1.6% within the band. Design methodology and proof-of-concept simulation results of an implementation in 0.35um CMOS are presented.

References

[1]

Costa, P., Fiocchi, C., Gatti, U. and Maloberti, F. (1999). High-performance BiCMOS output buffer design strategies. In Proceedings of the 1999 IEEE International Symposium on Circuits and Systems (Orlando, FL, 30 May -- 02 Jun, 1999). ISCAS'99. IEEE, Piscataway, NJ, 168--171. DOI=http://dx.doi.org/10.1109/ISCAS.1999.780645.

Crossref

Google Scholar

[2]

Fan, X. and Chan, P. 2005. Analysis and Design of Low-Distortion CMOS Source Followers. IEEE Trans. Circuits Syst. Regul. Pap., 52, 8 (Aug. 2005), 1489--1501. DOI=http://dx.doi.org/10.1109/TCSI.2005.851711.

Crossref

Google Scholar

[3]

Gray, P. R., Hurst, P. J., Lewis, S. H. and Meyer, R. G. 2001. Analysis and Design of Analog CMOS Integrated Circuits. Wiley, New York, NY.

Digital Library

Google Scholar

[4]

Hekmat, M. and Garg, V. 2006. Design and Analysis of a Source-Follower Track-and-Hold Circuit. Retrieved June 2, 2010, from Stanford University: http://www.stanford.edu/~hekmat/Mohammad_Hekmat_EE315_Prj_Report_Rev02.pdf.

Google Scholar

[5]

Rapakko, H. and Kostamovaara, J. 2007. On the Performance and Use of an Improved Source-Follower Buffer. IEEE Trans. Circuits Syst. Regul. Pap., 54, 3 (Mar. 2007), 504--517. DOI=http://dx.doi.org/10.1109/TCSI.2006.887609.

Crossref

Google Scholar

Cited By

View all

Yoon SKwon K(2015)A source-follower with bias current regulator for enhanced linearity2015 International SoC Design Conference (ISOCC)10.1109/ISOCC.2015.7401738(243-244)Online publication date: Nov-2015
https://doi.org/10.1109/ISOCC.2015.7401738
Campos MFortunato Ados Reis Filho C(2011)New 12-bit source-follower track-and-hold circuit suitable for high-speed applications2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip10.1109/VLSISoC.2011.6081655(82-85)Online publication date: Oct-2011
https://doi.org/10.1109/VLSISoC.2011.6081655

Index Terms

A -60dB THD/100MHz true unity-gain voltage buffer CMOS circuit
1. Hardware
  1. Integrated circuits
    1. Interconnect
      1. Input / output circuits

Recommendations

A highly linear CMOS buffer based on third harmonic cancellation

An open loop high speed CMOS differential source follower buffer with improved linearity and negligible extra power consumption in comparison to conventional one is presented. The conventional linear buffers which are commonly implemented in closed loop ...
A Fully Differential CMOS Voltage Buffer for Continuous- and Discrete-Time Applications

This paper presents a new CMOS analog fully differential voltage buffer, with large dynamic range and low harmonic distortion. Its design is based on the use of cross-coupled input differential pairs and internal current feedback. Two design approaches ...
A CMOS Low Voltage, High Gain Op-Amp
EDTC '97: Proceedings of the 1997 European conference on Design and Test

A CMOS, self biasing, single supply op-amp is presented. It is designed with regulated cascode transistors for gain enhancement and a common mode feedback technique for bias stabilisation of complementary regulated cascodes. It enables supply voltage ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

SBCCI '10: Proceedings of the 23rd symposium on Integrated circuits and system design

September 2010

228 pages

ISBN:9781450301527

DOI:10.1145/1854153

General Chair:
João Antonio Martino
USP, Brazil
,
Program Chairs:
Guido Araújo
UNICAMP, Brazil
,
Alex Orailoglu
UCSD, USA
,
Publications Chair:
Felipe Klein
UNICAMP, Brazil

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

In-Cooperation

SBMicro
IEEE ICAS
IEEE Circuits and Systems Society
SBC

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 06 September 2010

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Conference

SBCCI '10

Sponsor:

SIGDA

SBCCI '10: 23rd Symposium on Integrated Circuits and Systems Design

September 6 - 9, 2010

São Paulo, Brazil

Acceptance Rates

Overall Acceptance Rate 133 of 347 submissions, 38%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

2
Total Citations
View Citations
231
Total Downloads

Downloads (Last 12 months)8
Downloads (Last 6 weeks)1

Reflects downloads up to 20 Jan 2025

Other Metrics

View Author Metrics

Citations

Cited By

View all

Yoon SKwon K(2015)A source-follower with bias current regulator for enhanced linearity2015 International SoC Design Conference (ISOCC)10.1109/ISOCC.2015.7401738(243-244)Online publication date: Nov-2015
https://doi.org/10.1109/ISOCC.2015.7401738
Campos MFortunato Ados Reis Filho C(2011)New 12-bit source-follower track-and-hold circuit suitable for high-speed applications2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip10.1109/VLSISoC.2011.6081655(82-85)Online publication date: Oct-2011
https://doi.org/10.1109/VLSISoC.2011.6081655

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

A highly linear CMOS buffer based on third harmonic cancellation

A Fully Differential CMOS Voltage Buffer for Continuous- and Discrete-Time Applications

A CMOS Low Voltage, High Gain Op-Amp