Protective redundancy overhead reduction using instruction vulnerability factor

Reviewer: Amos O Olagunju

Due to increasing pervasive vulnerabilities and attacks, emerging computer technologies require new and effective fault tolerance mechanisms and algorithms. How should fault tolerance mechanisms and algorithms be designed and implemented to minimize energy consumption, hardware overhead, and instruction processing performance attributable to fault tolerance features__?__ How should programmers assign an adequate level of security to crucial instructions for mission-critical applications__?__ Advocating for programmers to become more proficient at assigning the adequate protection level to every computer instruction, Borodin and Juurlink present a novel metric for offline evaluation of the effect of faults in individual instructions on the overall result of computer applications. The proposed plan requires a simulation environment or the injection of faults by hardware into every instruction, in order to generate the offline profile of vulnerability for each instruction. In the scheme, faults such as arithmetic operations and memory loads are injected into each executed instruction that generates results, and the application's output is weighed against the correct result to gauge the effect of the faulty instruction. The instruction vulnerability factor (IVF) is the percentage of output items or bytes it corrupts, depending on the type of application. The average IVF rates are estimated, stored, and used to enforce adequate protection, only for time-consuming components of an application. The authors outline a technique for utilizing the IVF rate to execute each instruction once with no error discovery, or to duplicate and validate its execution. Borodin and Juurlink perform simulations with different kernels and applications, such as image addition, matrix multiplication, sum of absolute difference, computation of Fibonacci numbers, sound compression, and encoders and decoders for image compression. The experimental results of the evaluation of individual instruction-level vulnerabilities show significant performance improvement over well-known instruction-level fault tolerance configuration techniques [1]. The paper clearly articulates the issues of imprecise IVF assessment due to uncertainties in instruction execution of dynamic real-world applications. The IVF estimation is only appropriate for applications with evenly significant rates, but the authors offer valuable insights into the efficient design and implementation of fault tolerance mechanisms and algorithms. Online Computing Reviews Service