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A variable observation time method for testing delay faults

Published: 03 January 1991 Publication History

Abstract

Test methodologies for delay faults usually observe output patterns at a single observation time, and the same observation time is used for all faults in the circuit under test. In this paper we show that use of a single observation time is not advantageous for testing delay faults, and we are able to show that the detection threshold can be dramatically improved by using a testing methodology that allows variable, fault-dependent and output-dependent observation times. A “waveform-type” simulation method is used for calculating detection thresholds for definitely detectable faults. Statistical distributions of delay fault detection thresholds are presented for ten benchmark circuits.

References

[1]
W.Mao, M.D.Ciletti, "A Simplified Six-Waveform Type Method for Delay Fault Testing," Proc. of the 26tla Design AutomaIion Conf., pp.730-733.
[2]
V.S. Iyengar, B.K. Rosen, and I. Spillinger, "Delay Test Generation 1 -- Concepts and Coverage Metrics," 1988 IEEE ITC, pp.857-866.
[3]
V.S. Iyengar, B.K. Rosen, and I. Spillinger, "Delay Test Generation 2 -- Algebra and Algorithm," 1988 IEEE ITC, pp.867-876.
[4]
G.L. Smith, "Model for Delay Faults Upon Path," 1985 IEEE ITC, pp.342-349.
[5]
J.L. Carter, V.S. Iyengar, and B.K. Rosen, "Efficient Test Coverage Determination for Delay Faults," 1987 IEEE ITC,
[6]
A.K. Pramamick and S.M. RedO), "On the Detection of Delay Faults," 1988 IEEE ITC, pp.845-856.
[7]
Texas Instrumems,"2 micron CMOS Standard Cell Data Book," 1986.

Cited By

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  • (2020)Using programmable delay monitors for wear-out and early life failure predictionProceedings of the 23rd Conference on Design, Automation and Test in Europe10.5555/3408352.3408535(804-809)Online publication date: 9-Mar-2020
  • (2013)Built-in generation of multicycle functional broadside tests with observation pointsACM Transactions on Design Automation of Electronic Systems10.1145/253439619:1(1-17)Online publication date: 20-Dec-2013
  • (2010)On-Chip Delay Measurement Based Response Analysis for Timing CharacterizationJournal of Electronic Testing: Theory and Applications10.1007/s10836-010-5188-126:6(599-619)Online publication date: 1-Dec-2010
  • Show More Cited By

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        cover image ACM Conferences
        DAC '90: Proceedings of the 27th ACM/IEEE Design Automation Conference
        January 1991
        742 pages
        ISBN:0897913639
        DOI:10.1145/123186
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        New York, NY, United States

        Publication History

        Published: 03 January 1991

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        DAC90: The 27th ACM/IEEE-CS Design Automation Conference
        June 24 - 27, 1990
        Florida, Orlando, USA

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        DAC '90 Paper Acceptance Rate 125 of 427 submissions, 29%;
        Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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        Cited By

        View all
        • (2020)Using programmable delay monitors for wear-out and early life failure predictionProceedings of the 23rd Conference on Design, Automation and Test in Europe10.5555/3408352.3408535(804-809)Online publication date: 9-Mar-2020
        • (2013)Built-in generation of multicycle functional broadside tests with observation pointsACM Transactions on Design Automation of Electronic Systems10.1145/253439619:1(1-17)Online publication date: 20-Dec-2013
        • (2010)On-Chip Delay Measurement Based Response Analysis for Timing CharacterizationJournal of Electronic Testing: Theory and Applications10.1007/s10836-010-5188-126:6(599-619)Online publication date: 1-Dec-2010
        • (2008)Improving the transition fault coverage of functional broadside tests by observation point insertionIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200045316:7(931-936)Online publication date: 1-Jul-2008
        • (2007)System-on-Chip Test ArchitecturesundefinedOnline publication date: 20-Nov-2007
        • (2006)VLSI Test Principles and ArchitecturesundefinedOnline publication date: 14-Aug-2006
        • (2004)What Does Robust Testing a Subset of Paths, Tell us about the Untested Paths in the Circuit?Proceedings of the 22nd IEEE VLSI Test Symposium10.5555/987684.987967Online publication date: 25-Apr-2004
        • (2002)Enhancing test efficiency for delay fault testing using multiple-clocked schemesProceedings of the 39th annual Design Automation Conference10.1145/513918.514013(371-374)Online publication date: 10-Jun-2002
        • (2001)Timing simulation of digital circuits with binary decision diagramsProceedings of the conference on Design, automation and test in Europe10.5555/367072.367324(460-466)Online publication date: 13-Mar-2001
        • (1998)Delay fault models for VLSI circuitsIntegration, the VLSI Journal10.1016/S0167-9260(98)00019-426:1-2(21-40)Online publication date: 1-Dec-1998
        • Show More Cited By

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